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54F378DM PDF预览

54F378DM

更新时间: 2024-11-27 22:36:43
品牌 Logo 应用领域
美国国家半导体 - NSC 触发器逻辑集成电路
页数 文件大小 规格书
8页 169K
描述
Parallel D Register with Enable

54F378DM 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.45
其他特性:WITH HOLD MODE系列:F/FAST
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:19.43 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:70000000 Hz
最大I(ol):0.02 A位数:6
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):45 mA
传播延迟(tpd):8.5 ns认证状态:Not Qualified
筛选级别:MIL-STD-883座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:80 MHz

54F378DM 数据手册

 浏览型号54F378DM的Datasheet PDF文件第2页浏览型号54F378DM的Datasheet PDF文件第3页浏览型号54F378DM的Datasheet PDF文件第4页浏览型号54F378DM的Datasheet PDF文件第5页浏览型号54F378DM的Datasheet PDF文件第6页浏览型号54F378DM的Datasheet PDF文件第7页 
January 1995  
54F/74F378  
Parallel D Register with Enable  
General Description  
The ’F378 is a 6-bit register with a buffered common En-  
able. This device is similar to the ’F174, but with common  
Enable rather than common Master Reset.  
Features  
Y
Y
Y
Y
Y
6-bit high-speed parallel register  
Positive edge-triggered D-type inputs  
Fully buffered common clock and enable inputs  
Input clamp diodes limit high-speed termination effects  
Full TTL and CMOS compatible  
Package  
Commercial  
74F378PC  
Military  
Package Description  
Number  
N16E  
J16A  
16-Lead (0.300 Wide) Molded Dual-In-Line  
×
54F378DM (QB)  
16-Lead Ceramic Dual-In-Line  
74F378SC (Note 1)  
74F378SJ (Note 1)  
M16A  
M16D  
W16A  
E20A  
16-Lead (0.150 Wide) Molded Small Outline, JEDEC  
×
16-Lead (0.300 Wide) Molded Small Outline, EIAJ  
×
54F378FM (QB)  
54F378LM (QB)  
16-Lead Cerpack  
20-Lead Ceramic Leadless Chip Carrier, Type C  
e
Note 1: Devices also available in 13 reel. Use suffix  
×
SCX and SJX.  
Logic Symbols  
Connection Diagrams  
Pin Assignment for  
DIP, SOIC and Flatpak  
Pin Assignment  
for LCC  
TL/F/9526–1  
IEEE/IEC  
TL/F/9526–2  
TL/F/9526–3  
TL/F/9526–4  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9526  
RRD-B30M75/Printed in U. S. A.  

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