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54F379DM PDF预览

54F379DM

更新时间: 2024-11-25 22:22:23
品牌 Logo 应用领域
美国国家半导体 - NSC 触发器锁存器逻辑集成电路
页数 文件大小 规格书
8页 169K
描述
Quad Parallel Register with Enable

54F379DM 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.37
其他特性:WITH HOLD MODE系列:F/FAST
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:19.43 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:75000000 Hz
最大I(ol):0.02 A位数:4
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:COMPLEMENTARY封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):40 mA传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:75 MHzBase Number Matches:1

54F379DM 数据手册

 浏览型号54F379DM的Datasheet PDF文件第2页浏览型号54F379DM的Datasheet PDF文件第3页浏览型号54F379DM的Datasheet PDF文件第4页浏览型号54F379DM的Datasheet PDF文件第5页浏览型号54F379DM的Datasheet PDF文件第6页浏览型号54F379DM的Datasheet PDF文件第7页 
August 1995  
54F/74F379  
Quad Parallel Register with Enable  
General Description  
The ’F379 is a 4-bit register with buffered common Enable.  
This device is similar to the ’F175 but features the common  
Enable rather than common Master Reset.  
Features  
Y
Y
Y
Y
Y
Edge triggered D-type inputs  
Buffered positive edge-triggered clock  
Buffered common enable input  
True and complement outputs  
Guaranteed 4000V minimum ESD protection  
Package  
Commercial  
74F379PC  
Military  
Package Description  
Number  
N16E  
J16A  
16-Lead (0.300 Wide) Molded Dual-In-Line  
×
54F379DM (QB)  
16-Lead Ceramic Dual-In-Line  
74F379SC (Note 1)  
74F379SJ (Note 1)  
M16A  
M16D  
W16A  
E20A  
16-Lead (0.300 Wide) Molded Small Outline, JEDEC  
×
16-Lead (0.300 Wide) Molded Small Outline, EIAJ  
×
54F379FM (QB)  
54F379LM (QB)  
16-Lead Cerpack  
20-Lead Ceramic Leadless Chip Carrier, Type C  
e
Note 1: Devices also available in 13 reel. Use suffix  
×
SCX and SJX.  
Logic Symbols  
Connection Diagrams  
Pin Assignment  
DIP, SOIC and Flatpak  
Pin Assignment  
for LCC  
IEEE/IEC  
TL/F/9527–1  
TL/F/9527–2  
TL/F/9527–5  
TL/F/9527–3  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9527  
RRD-B30M115/Printed in U. S. A.  

54F379DM 替代型号

型号 品牌 替代类型 描述 数据表
SN74F379N TI

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F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16

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