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525-01RT

更新时间: 2024-11-03 20:00:47
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
10页 225K
描述
Clock Generator, 160MHz, PDSO28, 0.150 INCH, MO-153, SSOP-28

525-01RT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:0.150 INCH, MO-153, SSOP-28
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.1JESD-30 代码:R-PDSO-G28
JESD-609代码:e0长度:9.9 mm
湿度敏感等级:1端子数量:28
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:160 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP28,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
电源:3.3/5 V主时钟/晶体标称频率:50 MHz
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Clock Generators最大供电电压:5.5 V
最小供电电压:3 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL宽度:3.9 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

525-01RT 数据手册

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DATASHEET  
USER CONFIGURABLE CLOCK  
ICS525-01/02/11/12  
Description  
Features  
The ICS525-01/02/11/12 are the most flexible way to  
generate a high-quality, high-accuracy, high-frequency  
clock output from an inexpensive crystal or clock input.  
The user can configure the device to produce nearly  
any output frequency from any input frequency by  
grounding or floating the select pins. Neither  
microcontroller, software, nor device programmer are  
needed to set the frequency. Using Phase-Locked Loop  
(PLL) techniques, the device accepts a standard  
fundamental mode, inexpensive crystal to produce  
output clocks up to 250 MHz. It can also produce a  
highly accurate output clock from a given input clock,  
keeping them frequency locked together.  
Packaged as 28-pin SSOP (150 mil body)  
Industrial and commercial versions available in Pb  
(lead) free package  
User determines the output frequency by setting all  
internal dividers  
Eliminates need for custom oscillators  
No software needed  
Online calculator determines register settings  
Pull-ups on all select inputs  
Input crystal frequency of 5 - 27 MHz  
Input clock frequency of 2 - 50 MHz  
Very low jitter  
Duty cycle of 45/55 up to 200 MHz  
Operating voltage of 3.0 V or 5.5 V  
Ideal for oscillator replacement  
Industrial temperature version available  
For Zero Delay, refer to the ICS527  
For similar capability with a serial interface, use the  
ICS307. For simple multipliers to produce common  
frequencies, refer to the ICS50x family of parts, which  
are smaller and more cost effective.  
These products are intended for clock generation. They  
have low output jitter (variation in the output period), but  
input to output skew and jitter are not defined nor  
guaranteed. For applications which require defined  
input to output timing, use the ICS527-01.  
Block Diagram  
VDD  
2
PD  
X1/ICLK  
CLK  
REF  
Phase Comparator,  
Charge Pump, and  
Loop Filter  
Reference  
Divider  
Crystal  
Oscillator  
VCO  
Crystal or clock  
input  
Output  
Divider  
X2  
VCO  
Divider  
Optional crystal capacitors  
2
7
9
3
GND  
R6:R0  
V8:V0  
S2:S0  
IDT™ / ICS™ USER CONFIGURABLE CLOCK  
1
ICS525-01/02/11/12 REV S 042407  

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