®
IS42S32200
512K Bits x 32 Bits x 4 Banks (64-MBIT)
SYNCHRONOUS DYNAMIC RAM
ISSI
PRELIMINARY INFORMATION
August 2003
FEATURES
OVERVIEW
ISSI's64MbSynchronousDRAMIS42S32200isorganized
as524,288 bitsx32-bitx4-bankforimprovedperformance.
The synchronous DRAMs achieve high-speed data transfer
using pipeline architecture. All inputs and outputs signals
refer to the rising edge of the clock input.
• Clock frequency: 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Single 3.3V power supply
PIN CONFIGURATION
(86-Pin TSOP (Type II)
• LVTTLinterface
• Programmable burst length
– (1, 2, 4, 8, full page)
VCC
I/O0
1
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
GND
I/O15
GNDQ
I/O14
I/O13
VCCQ
I/O12
I/O11
GNDQ
I/O10
I/O9
2
• Programmableburstsequence:
Sequential/Interleave
VCCQ
I/O1
3
4
I/O2
5
GNDQ
I/O3
6
• Self refresh modes
7
I/O4
8
VCCQ
I/O5
9
• 4096 refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
I/O6
GNDQ
I/O7
VCCQ
I/O8
NC
NC
VCC
DQM0
WE
GND
DQM1
NC
• Burst read/write and burst read/single write
operationscapability
CAS
RAS
CS
NC
CLK
CKE
A9
• Burst termination by burst stop and precharge
command
NC
BA0
A8
BA1
A7
A10/AP
A0
A6
• Industrialtemperatureavailability
• Package 400-mil 86-pin TSOP II
A5
A1
A4
A2
A3
DQM2
VCC
NC
DQM3
GND
NC
I/O16
GNDQ
I/O17
I/O18
VCCQ
I/O19
I/O20
GNDQ
I/O21
I/O22
VCCQ
I/O23
VCC
I/O31
VCCQ
I/O30
I/O29
GNDQ
I/O28
I/O27
VCCQ
I/O26
I/O25
GNDQ
I/O24
GND
PIN DESCRIPTIONS
A0-A10
BA0, BA1
I/O0 to I/O31
CLK
Address Input
Bank Select Address
Data I/O
System Clock Input
Clock Enable
CKE
CS
Chip Select
Vcc
Power
RAS
Row Address Strobe Command
Column Address Strobe Command
Write Enable
GND
VccQ
GNDQ
NC
Ground
CAS
Power Supply for I/O Pin
Ground for I/O Pin
No Connection
WE
DQM0 to DQM3 Input/Output Mask
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
PRELIMINARY INFORMATION Rev. 00B
08/14/03