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2N5906_TO-78

更新时间： 2024-11-02 07:28:59
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LOW NOISE, LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET

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2N5906_TO-78 数据手册

  
2N5906  
LOW NOISE, LOW DRIFT  
MONOLITHIC DUAL  
N-CHANNEL JFET  
FEATURES  
LOW DRIFT  
ULTRA LOW LEAKAGE  
LOW PINCHOFF  
ABSOLUTE MAXIMUM RATINGS  
@ 25°C (unless otherwise noted)  
The 2N5906 is a high-performance monolithic dual  
JFET featuring tight matching and low drift over  
temperature specifications, and is targeted for use in a  
wide range of precision instrumentation applications  
where tight tracking is required.  
| VGS1‐2 / T| = 5µV/°C TYP.  
IG = 150fA TYP.  
Vp = 2V TYP.  
The hermetically sealed TO-78 package is well suited  
for hi-reliability and harsh environment applications.  
Maximum Temperatures  
Storage Temperature  
Operating Junction Temperature  
‐65°C to +150°C  
+150°C  
(See Packaging Information).  
Maximum Voltage and Current for Each Transistor – Note 1  
‐VGSS  
‐VDSO  
‐IG(f)  
‐IG  
Gate Voltage to Drain or Source  
Drain to Source Voltage  
Gate Forward Current  
40V  
40V  
10mA  
10µA  
Gate Reverse Current  
2N5906 Benefits:  
Maximum Power Dissipation  
Device Dissipation @ Free Air – Total  
MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED  
40mW @ +125°C  
ƒ
ƒ
ƒ
ƒ
Tight Tracking  
Good matching  
Ultra Low Leakage  
Low Drift  
SYMBOL  
CHARACTERISTICS VALUE UNITS CONDITIONS  
| VGS1‐2 / T| max.  
DRIFT VS.  
TEMPERATURE  
5
µV/°C  
VDG=10V, ID=30µA  
TA=‐55°C to +125°C  
VDG=10V, ID=30µA  
| V GS1‐2 | max.  
OFFSET VOLTAGE  
5
mV  
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)  
SYMBOL  
BVGSS  
BVGGO  
CHARACTERISTICS  
Breakdown Voltage  
Gate‐To‐Gate Breakdown  
TRANSCONDUCTANCE  
Full Conduction  
MIN.  
40  
40  
TYP.  
60  
‐‐  
MAX.  
‐‐  
‐‐  
UNITS  
V
V
CONDITIONS  
VDS = 0  
ID=1nA  
IG= 1nA  
ID= 0  
IS= 0  
YfSS  
YfS  
|YFS1‐2 / Y FS|  
70  
50  
‐‐  
300  
100  
1
500  
200  
5
µmho  
µmho  
%
VDG= 10V  
VDG= 10V  
VGS= 0V f = 1kHz  
ID= 30µA f = 1kHz  
Typical Operation  
Mismatch  
DRAIN CURRENT  
Full Conduction  
IDSS  
|IDSS1‐2 / IDSS  
60  
‐‐  
400  
2
1000  
5
µA  
%
VDG= 10V  
VGS= 0V  
|
Mismatch at Full Conduction  
Click To Buy  
GATE VOLTAGE  
VGS(off) or Vp  
VGS(on)  
Pinchoff voltage  
Operating Range  
GATE CURRENT  
Operating  
0.6  
‐‐  
2
‐‐  
4.5  
4
V
V
VDS= 10V  
VDS=10V  
ID= 1nA  
ID=30µA  
‐IGmax.  
‐IGmax.  
‐IGSSmax.  
‐IGSSmax.  
IGGO  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
1
1
1
2
5
‐‐  
pA  
nA  
pA  
nA  
pA  
VDG= 10V ID= 30µA  
TA= +125°C  
VDS =0V VGS= 20V  
TA= +125°C  
High Temperature  
At Full Conduction  
High Temperature  
Gate‐to‐Gate Leakage  
OUTPUT CONDUCTANCE  
Full Conduction  
Operating  
VGG= 20V  
YOSS  
YOS  
|YOS1‐2  
‐‐  
‐‐  
‐‐  
‐‐  
0.1  
0.01  
5
0.1  
0.1  
VDG= 10V  
VDG= 10V  
VGS= 0V  
ID=30µA  
µmho  
dB  
|
Differential  
COMMON MODE REJECTION  
‐20 log |∆VGS1‐2/∆VDS|  
‐20 log |∆VGS1‐2/∆VDS|  
NOISE  
CMR  
CMR  
‐‐  
‐‐  
90  
90  
‐‐  
‐‐  
∆VDS = 10 to 20V  
∆VDS = 5 to 10V  
VDS= 10V VGS= 0V  
ID=30µA  
ID=30µA  
RG= 10MΩ  
NF  
en  
Figure  
Voltage  
‐‐  
‐‐  
‐‐  
20  
1
70  
dB  
nV/√Hz  
f= 100Hz  
NBW= 6Hz  
VDG=10V ID=30µA f=10Hz NBW=1Hz  
CAPACITANCE  
CISS  
CRSS  
CDD  
Input  
Reverse Transfer  
Drain‐to‐Drain  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
3
1.5  
0.1  
VDS= 10V  
VGS= 0V  
f= 1MHz  
pF  
VDG = 20V ID=30µA  
Micross Components Europe  
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired  
TO-78 (Bottom View)  
Available Packages:  
2N5906 in TO-78  
2N5906 available as bare die  
Please contact Micross for full package and die dimensions  
Tel: +44 1603 788967  
Email: chipcomponents@micross.com  
Web: http://www.micross.com/distribution  
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or  
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.  
1

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