Datasheet > 28LV64A-T30I/SO

28LV64A-T30I/SO

更新时间： 2024-09-28 23:19:39

品牌	Logo	应用领域
其他 - ETC		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
8页	116K
描述
x8 EEPROM

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中文翻译

获取价格

数据手册

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28LV64A-T30I/SO 数据手册

28LV64A

64K (8K x 8) Low Voltage CMOS EEPROM

FEATURES

PACKAGE TYPES

• 2.7V to 3.6V Supply

RDY/BSY

A12

• 1

28 Vcc

27 WE

26 NC

25 A8

• Read Access Time—300 ns

• CMOS Technology for Low Power Dissipation

- 8 mA Active

- 50 µA CMOS Standby Current

• Byte Write Time—3 ms

• Data Retention >200 years

• High Endurance - Minimum 100,000 Erase/Write

Cycles

• Automatic Write Operation

- Internal Control Timer

A1 10

A0 11

NC 12

I/O0 13

29 A8

28 A9

24 A9

23 A11

22 OE

21 A10

20 CE

19 I/O7

18 I/O6

17 I/O5

16 I/O4

15 I/O3

27 A11

26 NC

25 OE

24 A10

23 CE

22 I/O7

21 I/O6

I/O0

I/O1

I/O2

V_SS14

Auto-Clear Before Write Operation

• Pin 1 indicator on PLCC on top of package

- On-Chip Address and Data Latches

• Data Polling

• Ready/Busy

• Chip Clear Operation

BLOCK DIAGRAM

I/O0...................I/O7

• Enhanced Data Protection

- VCC Detector

- Pulse Filter

VSS

VCC

Data Protection

Circuitry

Chip Enable/

Output Enable

Control Logic

- Write Inhibit

• Electronic Signature for Device Identiﬁcation

• Organized 8Kx8 JEDEC Standard Pinout

- 28-pin Dual-In-Line Package

- 32-pin Chip Carrier (Leadless or Plastic)

• Available for Extended Temperature Ranges:

- Commercial: 0˚C to +70˚C

- Industrial: -40˚C to +85˚C

Auto Erase/Write

Timing

Data

Poll

Input/Output

Buffers

Rdy/

Busy

Program Voltage

Generation

Y Gating

Decoder

64K bit

Cell Matrix

DESCRIPTION

Decoder

The Microchip Technology Inc. 28LV64A is a CMOS 64K non-vol-

atile electrically Erasable PROM organized as 8K words by 8 bits.

The 28LV64A is accessed like a static RAM for the read or write

cycles without the need of external components. During a “byte

write”, the address and data are latched internally, freeing the

microprocessor address and data bus for other operations. Fol-

lowing the initiation of write cycle, the device will go to a busy state

and automatically clear and write the latched data using an inter-

nal control timer. To determine when the write cycle is complete,

the user has a choice of monitoring the Ready/Busy output or

using Data polling. The Ready/Busy pin is an open drain output,

which allows easy conﬁguration in ‘wired-or’ systems. Alterna-

tively, Data polling allows the user to read the location last written

to when the write operation is complete. CMOS design and pro-

cessing enables this part to be used in systems where reduced

power consumption and reliability are required. A complete family

of packages is offered to provide the utmost ﬂexibility in applica-

tions.

A12

1988 Microchip Technology Inc.

Preliminary

DS21113D-page 1

12 3 4 5 6 7 8

中文翻译

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与28LV64A-T30I/SO相关器件

型号	品牌	获取价格	描述	数据表
28LV64A-T-30I/SO	MICROCHIP	获取价格	64K (8K x 8) Low Voltage CMOS EEPROM
28LV64AT30I/TS	MICROCHIP	获取价格	IC,EEPROM,8KX8,CMOS,TSSOP,28PIN,PLASTIC
28LV64A-T-30I/TS	MICROCHIP	获取价格	64K (8K x 8) Low Voltage CMOS EEPROM
28LV64AT30I/VS	MICROCHIP	获取价格	IC,EEPROM,8KX8,CMOS,TSSOP,28PIN,PLASTIC
28LV64A-T-30I/VS	MICROCHIP	获取价格	64K (8K x 8) Low Voltage CMOS EEPROM
28M0	MICROSEMI	获取价格	60V 300mA MONOLITHIC DIODE ARRAY
28M0B	MICROSEMI	获取价格	60V 300mA MONOLITHIC DIODE ARRAY
28M0BC	MICROSEMI	获取价格	60V 300mA MONOLITHIC DIODE ARRAY
28M0BS	MICROSEMI	获取价格	60V 300mA MONOLITHIC DIODE ARRAY
28M0D	MICROSEMI	获取价格	60V 300mA MONOLITHIC DIODE ARRAY

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