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24VL014/MNY PDF预览

24VL014/MNY

更新时间: 2024-01-06 05:29:56
品牌 Logo 应用领域
美国微芯 - MICROCHIP 存储内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
30页 466K
描述
1K I2C™ Serial EEPROM

24VL014/MNY 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:4.40 MM, PLASTIC, TSSOP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51Factory Lead Time:18 weeks
风险等级:5.57Is Samacsys:N
最大时钟频率 (fCLK):0.4 MHz数据保留时间-最小值:200
耐久性:1000000 Write/Erase CyclesI2C控制字节:1010DDDR
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.4 mm内存密度:1024 bit
内存集成电路类型:EEPROM内存宽度:8
湿度敏感等级:1功能数量:1
端子数量:8字数:128 words
字数代码:128工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-20 °C
组织:128X8封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:SERIAL峰值回流温度(摄氏度):260
电源:1.8/3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm串行总线类型:I2C
最大待机电流:0.000001 A子类别:EEPROMs
最大压摆率:0.003 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.5 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3 mm最长写入周期时间 (tWC):5 ms
写保护:HARDWAREBase Number Matches:1

24VL014/MNY 数据手册

 浏览型号24VL014/MNY的Datasheet PDF文件第2页浏览型号24VL014/MNY的Datasheet PDF文件第3页浏览型号24VL014/MNY的Datasheet PDF文件第4页浏览型号24VL014/MNY的Datasheet PDF文件第6页浏览型号24VL014/MNY的Datasheet PDF文件第7页浏览型号24VL014/MNY的Datasheet PDF文件第8页 
24VL014  
2.0  
PIN DESCRIPTIONS  
The descriptions of the pins are listed in Table 2-1.  
TABLE 2-1:  
Name  
PIN FUNCTION TABLE  
8-pin  
PDIP  
8-pin  
SOIC  
8-pin  
TSSOP  
8-pin  
MSOP  
8-pin  
TDFN  
6-pin  
SOT-23  
Function  
A0  
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
5
4
User Configurable Chip Select  
User Configurable Chip Select  
User Configurable Chip Select  
Ground  
A1  
A2  
2
VSS  
SDA  
SCL  
WP  
VCC  
3
Serial Data  
1
Serial Clock  
6
Write-Protect Input  
+1.5V to 3.6V  
2.1  
SDA Serial Data  
2.5  
Noise Protection  
This is a bidirectional pin used to transfer addresses  
and data into and out of the device. It is an open drain  
terminal. Therefore, the SDA bus requires a pull-up  
resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for  
400 kHz).  
The 24VL014 employs a VCC threshold detector circuit  
that disables the internal erase/write logic if the VCC is  
below 1.0 volts at nominal conditions.  
The SCL and SDA inputs have Schmitt Trigger and  
filter circuits that suppress noise spikes to assure  
proper device operation even on a noisy bus.  
For normal data transfer, SDA is allowed to change  
only during SCL low. Changes during SCL high are  
reserved for indicating the Start and Stop conditions.  
2.2  
SCL Serial Clock  
The SCL input is used to synchronize the data transfer  
to and from the device.  
2.3  
A0, A1, A2  
The A0, A1 and A2 inputs are used by the 24VL014 for  
multiple device operations. The levels on these inputs  
are compared with the corresponding bits in the slave  
address. The chip is selected if the compare is true.  
Up to eight 24VL014 devices (four for the SOT-23  
package) may be connected to the same bus by using  
different Chip Select bit combinations. These inputs  
must be connected to either VCC or VSS.  
In most applications, the chip address inputs A0, A1  
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For  
applications in which these pins are controlled by a  
microcontroller or other programmable device, the chip  
address pins must be driven to logic ‘0’ or logic ‘1’  
before normal device operation can proceed.  
2.4  
WP  
WP is the hardware write-protect pin. It must be tied to  
VCC or VSS. If tied to VCC, the hardware write protection  
is enabled and will protect the entire array (00h-7Fh). If  
the WP pin is tied to VSS the hardware write protection  
is disabled. Write Protection is not available on the  
SOT-23 package; for this package, write operations are  
always enabled.  
© 2009 Microchip Technology Inc.  
DS22129A-page 5  

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