CC1150
Pin # Pin name
Pin type
Description
1
2
Digital Input
Serial configuration interface, clock input
SCLK
Digital Output
Serial configuration interface, data output.
SO(GDO1)
Optional general output pin when CSnis high
3
4
Power (Digital)
Power (Digital)
1.8V-3.6V digital power supply for digital I/Oís and for the digital core
voltage regulator
DVDD
1.6V-2.0V digital power supply output for decoupling.
DCOUPL
NOTE: This pin is intended for use with the
used to provide supply voltage to other devices.
only. It can not be
5
6
7
8
Analog I/O
Power (Analog)
Analog I/O
Digital I/O
Crystal oscillator pin 1, or external clock input
1.8V-3.6V analog power supply connection
Crystal oscillator pin 2
XOSC_Q1
AVDD
XOSC_Q2
GDO0
Digital output pin for general use:
•
•
•
•
Test signals
FIFO status signals
Clock output, down-divided from XOSC
Serial input TX data
(ATEST)
Also used as analog test I/O for prototype/production testing
9
Digital Input
RF I/O
Serial configuration interface, chip select
CSn
10
11
12
13
14
15
16
Positive RF output signal from PA
RF_P
RF_N
AVDD
AVDD
RBIAS
DGUARD
SI
RF I/O
Negative RF output signal from PA
Power (Analog)
Power (Analog)
Analog I/O
Power (Digital)
Digital Input
1.8V-3.6V analog power supply connection
1.8V-3.6V analog power supply connection
External bias resistor for reference current
Power supply connection for digital noise isolation
Serial configuration interface, data input
Table 11: Pinout overview
13 Circuit Description
RADIO CONTROL
SCLK
RF_P
FREQ
SYNTH
SO (GDO1)
PA
RF_N
SI
CSn
GDO0 (ATEST)
BIAS
XOSC
RBIAS XOSC_Q1 XOSC_Q2
Figure 2:
Simplified Block Diagram
synthesizer includes a completely on-chip LC
VCO.
A simplified block diagram of
in Figure 2.
is shown
A crystal is to be connected to XOSC_Q1 and
XOSC_Q2. The crystal oscillator generates the
The
transmitter is based on direct
synthesis of the RF frequency. The frequency
Preliminary Data Sheet (rev. 1.0.)
SWRS037
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