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100LVELT22MX PDF预览

100LVELT22MX

更新时间: 2024-11-09 13:02:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
5页 123K
描述
TTL/CMOS to PECL Translator, 2 Func, Complementary Output, PDSO8, 0.150 INCH, MS-012, SOIC-8

100LVELT22MX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.150 INCH, MS-012, SOIC-8
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.73最大延迟:0.6 ns
接口集成电路类型:TTL/CMOS TO PECL TRANSLATORJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
湿度敏感等级:1位数:1
功能数量:2端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出锁存器或寄存器:NONE输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.753 mm子类别:Level Translators
最大供电电压:3.8 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

100LVELT22MX 数据手册

 浏览型号100LVELT22MX的Datasheet PDF文件第2页浏览型号100LVELT22MX的Datasheet PDF文件第3页浏览型号100LVELT22MX的Datasheet PDF文件第4页浏览型号100LVELT22MX的Datasheet PDF文件第5页 
January 2003  
Revised January 2003  
100LVELT22  
3.3V Dual LVTTL/LVCMOS to  
Differential LVPECL Translator  
General Description  
Features  
Typical propagation delay of 350 ps  
The 100LVELT22 is  
a
LVTTL/LVCMOS to differential  
LVPECL translator operating from a single +3.3V supply.  
<100 ps skew between outputs  
Max ICC of 28 mA at 25°C  
Both outputs of a differential pair should be terminated in  
50to VCC - 2.0V even if only one output is being used. If  
When TTL input is left Open Q output defaults HIGH  
an output pair is unused both outputs can be left open  
(un-terminated).  
Fairchild MSOP-8 package is a drop-in replacement to  
ON TSSOP-8  
The 100 series is temperature compensated.  
Flow through pinout  
Meets or exceeds JEDEC specification EIA/JESD78 IC  
latch-up test  
Moisture Sensitivity Level 1  
ESD Performance:  
Human Body Model > 2000V  
Machine Model > 200V  
Ordering Code:  
Product  
Order Number Package  
Number Top Mark  
Code  
Package Description  
100LVELT22M  
M08A  
KVT22 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
KR22 8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide  
100LVELT22M8  
(Preliminary)  
MA08D  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Diagram  
Top View  
Pin Descriptions  
Pin Name  
Description  
Qn, Qn  
D0, D1  
VCC  
LVPECL Differential Outputs  
LVTTL/LVCMOS Inputs  
Positive Supply  
GND  
Ground  
© 2003 Fairchild Semiconductor Corporation  
DS500777  
www.fairchildsemi.com  

100LVELT22MX 替代型号

型号 品牌 替代类型 描述 数据表
100LVELT22M FAIRCHILD

完全替代

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator
MC100LVELT22DG ONSEMI

功能相似

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

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