100353QI

更新时间： 2024-11-06 22:14:39

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
8页	79K
描述
Low Power 8-Bit Register

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中文翻译

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数据手册
替代型号

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100353QI 数据手册

July 1988

Revised August 2000

100353

Low Power 8-Bit Register

General Description

The 100353 contains eight D-type edge triggered, master/

Features

■ Low power operation

slave flip-flops with individual inputs (D_n), true outputs (Q_n),

■ 2000V ESD protection

a clock input (CP), and a common clock enable pin (CEN).

Data enters the master when CP is LOW and transfers to

the slave when CP goes HIGH. When the CEN input goes

HIGH it overrides all other inputs, disables the clock, and

the Q outputs maintain the last state.

■ Voltage compensated operating range = −4.2V to −5.7V

■ Available to industrial grade temperature range

The 100353 output drivers are designed to drive 50Ω termi-

nation to −2.0V. All inputs have 50 kΩ pull-down resistors.

Ordering Code:

Order Number Package Number

Package Description

100353PC

100353QC

100353QI

N24E

V28A

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Industrial Temperature Range (−40°C to +85°C)

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagrams

24-Pin DIP

Pin Descriptions

Pin Names

Description

D₀–D₇

CEN

Data Inputs

Clock Enable Input

28-Pin PLCC

Clock Input (Active Rising Edge)

Data Outputs

Q₀–Q₇

No Connect

DS009882

www.fairchildsemi.com

12 3 4 5 6 7 8

中文翻译

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100353QI 替代型号

型号	品牌	替代类型	描述	数据表
100353QIX	FAIRCHILD	功能相似	Octal D-Type Flip-Flop

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