Datasheet > ZL9101MIRZ

ZL9101MIRZ

更新时间： 2024-11-29 07:44:39

品牌	Logo	应用领域
英特矽尔 - INTERSIL		/
页数	文件大小	规格书
17页	816K
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Digital DC/DC PMBus 12A Module

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ZL9101MIRZ 数据手册

Digital DC/DC PMBus 12A Module

ZL9101M

The ZL9101M is a 12A variable output step-down

Features

• Complete Digital Switch Mode Power Supply

PMBus-compliant digital power supply. Included in the module

is a high performance digital PWM controller, power MOSFETs,

an inductor, and all the passive components required for a

complete DC/DC power solution. The ZL9101M operates over

a wide input voltage range and supports an output voltage

range of 0.6V to 4V, which can be set by external resistors or

via PMBus. This high efficiency power module is capable of

delivering 12A. Only bulk input and output capacitors are

needed to finish the design. The output voltage can be

precisely regulated to as low as 0.6V with ±1% output voltage

regulation over line, load, and temperature variations.

• Fast Transient Response

• External Synchronization

• Output Voltage Tracking

• Current Sharing

• Programmable Soft-start Delay and Ramp

• Overcurrent/Undercurrent Protection

• PMBus Compliant

Applications

• Server, Telecom, and Datacom

• Industrial and Medical Equipment

• General Purpose Point of Load

The ZL9101M features internal compensation, internal

soft-start, auto-recovery overcurrent protection, an enable

option, and pre-biased output start-up capabilities.

The ZL9101M is packaged in a thermally enhanced, compact

(15mmx15mm) and low profile (3.5mm) over-molded QFN

package module suitable for automated assembly by standard

surface mount equipment. The ZL9101M is Pb-free and RoHS

compliant.

Related Literature

• See AN2033, “Zilker Labs PMBus Command Set - DDC

Products”

• See AN2034, “Configuring Current Sharing on the ZL2004

and ZL2006”

V_IN

V_DRV

10µF

16V

4.5V TO 13.2V

4.7µF

16V

4.7µF

16V

10µF

16V

4.5V TO 6.5V

2 x 22µF

16V

POWER GOOD OUTPUT

ENABLE

VIN

(EPAD)

V_OUT

VOUT

(EPAD)

Ext Sync

SYNC

DDC

3 x 47µF

ZL9101M

DDC Bus

(EPAD)

16V

SCL

SDA

RTN

PGND

(EPAD)

I²C/SMBus

Notes:

1. The I²C/SMBus requires pull-up resistors. Please refer to the I²C/SMBus specifications for more details.

2. The DDC bus requires a pull-up resistor. The resistance will vary based on the capacitive loading of the bus (and on the number of

devices connected). The 10k default value, assuming a maximum of 100pF per device, provides the necessary 1µs pull-up rise time.

Please refer to the Digital-DC Bus section for more details.

3. Additional capacitance may be required to meet specific transient response targets

4. The VR, V25, VDRV, and VDD capacitors should be placed no further than 0.5 cm from the pin.

FIGURE 1. 12A APPLICATION CIRCUIT

NOTE: Figure 1 represents a typical implementation of the ZL9101M. For PMBus operation, it is recommended to tie the enable pin (EN) to SGND.

April 8, 2011

FN7669.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

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