Digital DC/DC PMBus 17A Module
ZL9117M
The ZL9117M is a 17A, variable output, step-down
Features
• Complete Digital Switch Mode Power Supply
PMBus-compliant digital power supply. Included in the module
is a high-performance digital PWM controller, power MOSFETs,
an inductor, and all the passive components required for a
highly integrated DC/DC power solution. This power module
has built-in auto-compensation algorithms, which eliminates
the need for manual compensation design work. The ZL9117M
operates over a wide input voltage range and supports an
output voltage range of 0.6V to 3.6V, which can be set by
external resistors or via PMBus. This high-efficiency power
module is capable of delivering 17A. Only bulk input and
output capacitors are needed to finish the design. The output
voltage can be precisely regulated to as low as 0.6V with ±1%
output voltage regulation over line, load, and temperature
variations.
• Fast Transient Response
• Auto Compensating PID Filter
• External Synchronization
• Output Voltage Tracking
• Current Sharing
• Programmable Soft-start Delay and Ramp
• Overcurrent/Undercurrent Protection
• PMBus Compliant
Applications
• Server, Telecom, and Datacom
• Industrial and Medical Equipment
• General Purpose Point of Load
The ZL9117M features auto-compensation, internal soft-start,
auto-recovery overcurrent protection, an enable option, and
pre-biased output start-up capabilities.
The ZL9117M is packaged in a thermally enhanced, compact
(15mmx15mm) and low profile (3.5mm) over-molded QFN
package module suitable for automated assembly by standard
surface mount equipment. The ZL9117M is Pb-free and RoHS
compliant.
Related Literature
• See AN2033, “Zilker Labs PMBus Command Set for DDC
Products”
• See AN2034, “Configuring Current Sharing on the ZL2004
and ZL2006”
Figure 1 represents a typical implementation of the ZL9117M.
For PMBus operation, it is recommended to tie the Enable pin
(EN) to SGND.
VIN
VDRV
10µF
16V
4.5V TO 13.2V
4.7µF
16V
4.7µF
16V
10µF
16V
4.5V TO 6.5V
2 x 22µF
16V
POWER GOOD OUTPUT
ENABLE
PG
EN
VIN
(EPAD)
VOUT
VOUT
(EPAD)
EXT SYNC
SYNC
DDC
3
2
3 x 100µF
ZL9117M
DDC BUS
SW
(EPAD)
6.3V
SCL
SDA
RTN
PGND
(EPAD)
1
I2C/SMBus
SA
RSA
RSET
Notes:
1. The I2C/SMBus requires pull-up resistors. Please refer to the I2C/SMBus specifications for more details.
2. The DDC bus requires a pull-up resistor. The resistance will vary based on the capacitive loading of the bus (and on the number of
devices connected). The 10k default value, assuming a maximum of 100pF per device, provides the necessary 1µs pull-up rise time.
Please refer to the Digital-DC Bus section for more details.
3. Additional capacitance may be required to meet specific transient response targets.
4. The VR, V25, VDRV, and VDD capacitors should be placed no farther than 0.5 cm from the pin.
FIGURE 1. 17A APPLICATION CIRCUIT
October 21, 2011
FN7914.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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