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ZL50407GDC PDF预览

ZL50407GDC

更新时间： 2024-01-19 04:42:51
品牌 Logo 应用领域
美高森美 - MICROSEMI 局域网电信开关电信集成电路
页数 文件大小 规格书
135页 1634K
描述
DATACOM, LAN SWITCHING CIRCUIT, PBGA208, 17 X 17 MM, 1.40 MM HEIGHT, MO-192, LBGA-208

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ZL50407GDC 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：BGA, BGA208,16X16,40Reach Compliance Code：compliant
风险等级：5.56JESD-30 代码：S-PBGA-B208
端子数量：208最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装等效代码：BGA208,16X16,40
封装形状：SQUARE封装形式：GRID ARRAY
电源：1.8,3.3 V认证状态：Not Qualified
子类别：Network Interfaces表面贴装：YES
温度等级：INDUSTRIAL端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
Base Number Matches：1

ZL50407GDC 数据手册

 浏览型号ZL50407GDC的Datasheet PDF文件第2页浏览型号ZL50407GDC的Datasheet PDF文件第3页浏览型号ZL50407GDC的Datasheet PDF文件第4页浏览型号ZL50407GDC的Datasheet PDF文件第5页浏览型号ZL50407GDC的Datasheet PDF文件第6页浏览型号ZL50407GDC的Datasheet PDF文件第7页 
ZL50407  
Lightly Managed/Unmanaged 8FE + 1GE  
Layer-2 Ethernet Switch  
Data Sheet  
August 2006  
Zarlink Features  
•
Integrated Single-Chip 10/100/1000 Mbps  
Ordering Information  
Ethernet Switch  
•
•
Eight 10/100 Mbps auto-negotiating Fast  
Ethernet (FE) ports with RMII, MII, GPSI,  
Reverse MII & Reverse GPSI interface options  
One 10/100/1000 Mbps auto-negotiating port  
with GMII & MII interface options, that can be  
used as a WAN uplink or as a 9th port  
ZL50407GDC  
208-Ball LBGA  
ZL50407GDG2 208-Ball LBGA**  
**Pb Free Tin/Silver/Copper  
-40°C to +85°C  
•
•
Embedded 2.0 Mbits (256 KBytes) internal  
memory for control databases and frame data  
buffer  
•
IEEE-1149.1 (JTAG) test port  
L2 Switching  
•
•
Supports jumbo frames up to 4 KBytes  
L2 switching  
CPU access supports the following interface  
options:  
•
MAC address self learning, up to 4 K MAC  
addresses  
•
Serial interface in lightly managed mode, or in  
unmanaged mode with optional I2C EEPROM  
interface  
•
MAC address table supports unicast MAC  
address learning  
•
•
Operates stand-alone or can be cascaded with a  
•
•
Supports the following spanning standards  
second ZL50407 to reach 16 ports  
•
•
IEEE 802.1D spanning tree  
IEEE 802.1w rapid spanning tree  
Ethernet IEEE 802.3x flow control for full duplex  
ports, back pressure flow control for half duplex  
ports  
Supports Ethernet multicasting and broadcasting  
and flooding control  
•
•
Built-in reset logic triggered by system  
malfunction  
VLAN Support Features  
Built-In Self Test for internal SRAM  
C
P
Serial  
ZL50407  
U
10/100/  
GMII / MII  
1000  
PHY  
8-Port 10/100M + 1G  
Ethernet Switch  
EEPROM  
RMII / MII / GPSI  
Quad  
10/100  
PHY  
Quad  
10/100  
PHY  
Figure 1 - System Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved.  
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