ZL50417

更新时间： 2024-09-25 21:55:23

品牌	Logo	应用领域
加拿大卓联 - ZARLINK		以太网局域网（LAN）标准
页数	文件大小	规格书
163页	2005K
描述
Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch

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中文翻译

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数据手册

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ZL50417 数据手册

ZL50418

Managed 16-Port 10/100 M + 2-Port 1 G

Ethernet Switch

Data Sheet

February 2004

Features

•

Integrated Single-Chip 10/100/1000 Mbps

Ordering Information

Ethernet Switch

•

16 10/100 Mbps Autosensing, Fast Ethernet

Ports with RMII or Serial Interface (7WS). Each

port can independently use one of the two

interfaces

ZL50418/GKC 553-pin HSBGA

-40°C to +85°C

•

2 Gigabit Ports with GMII, PCS and 10/100

interface options per port

•

Provides port based and ID tagged VLAN support

(IEEE 802.1Q), up to 255 VLANs

Gigabit port supports hot swap in managed

configuration.

•

Supports IP Multicast with IGMP snooping

Supports spanning tree with CPU, on per port or

per VLAN basis

Supports 8/16-bit CPU interface in managed

mode

•

Packet Filtering and Port Security

•

Serial interface in unmanaged mode

• Static address filtering for source and/or

destination MAC

Supports two Frame Buffer Memory domains

with SRAM at 100 MHz

• Static MAC address not subject to aging

Secure mode freezes MAC address learning.

Each port may independently use this mode.

•

Supports memory size 2 MB, or 4 MB

•

• Two SRAM domains (2 MB or 4 MB) are

required

Applies centralized shared memory architecture

•

Full Duplex Ethernet IEEE 802.3x Flow Control

Backpressure flow control for Half Duplex ports

•

Up to 64 K MAC addresses

Supports Ethernet multicasting and broadcasting

and flooding control

Maximum throughput is 3.6 Gbps non-blocking

High performance packet forwarding (10.712 M

packets per second) at full wire speed

•

Supports per-system option to enable flow control

for best effort frames even on QoS-enabled ports

Frame Data Buffer A

SRAM (1 M / 2 M)

Frame Data Buffer B

SRAM (1 M / 2 M)

FDB Interface

LED

Engine

MCT

Link

FCB

Frame Engine

GMII/

PCS

Port

16 x 10 /100

RMII

Ports 0 - 15

16-bit

Parallel/

Serial

CPU

PCS

Management

Module

Port

Figure 1 - ZL50418 System Block Diagram

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

12 3 4 5 6 7...163

中文翻译

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与ZL50417相关器件

型号	品牌	获取价格	描述	数据表
ZL50417/GKC	MICROSEMI	获取价格	DATACOM, LAN SWITCHING CIRCUIT, PBGA553, 37.50 X 37.50 MM, 2.33 MM HEIGHT, MS-034, HSBGA-5
ZL50417GKG	ZARLINK	获取价格	LAN Switching Circuit, PBGA553, 37.50 X 37.50 MM, 2.33 MM HEIGHT, MS-034, HSBGA-553
ZL50417GKG2	MICROSEMI	获取价格	DATACOM, LAN SWITCHING CIRCUIT, PBGA553, 37.50 X 37.50 MM, 2.33 MM HEIGHT, LEAD FREE, MS-0
ZL50418	ZARLINK	获取价格	Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch
ZL50418GKC	ZARLINK	获取价格	Managed 16-Port 10/100 M + 2-Port 1 G Ethernet Switch
ZL50418GKG	ZARLINK	获取价格	暂无描述
ZL51B	YEASHIN	获取价格	500 mW DO-35 Hermetically Sealed Glass Zener Voltage Regulators
ZL56B	YEASHIN	获取价格	500 mW DO-35 Hermetically Sealed Glass Zener Voltage Regulators
ZL5V1B	YEASHIN	获取价格	500 mW DO-35 Hermetically Sealed Glass Zener Voltage Regulators
ZL5V6B	YEASHIN	获取价格	500 mW DO-35 Hermetically Sealed Glass Zener Voltage Regulators

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