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ZL50064 PDF预览

ZL50064

更新时间: 2024-01-06 08:30:25
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 开关
页数 文件大小 规格书
68页 887K
描述
16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (2, 4, 8, or 16Mbps), and 64 Inputs and 64 Outputs

ZL50064 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:QFP
包装说明:LFQFP, QFP256,1.2SQ,16针数:256
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.61JESD-30 代码:S-PQFP-G256
JESD-609代码:e0长度:28 mm
功能数量:1端子数量:256
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP256,1.2SQ,16封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):225
电源:1.8,3.3 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Other Telecom ICs
标称供电电压:1.8 V表面贴装:YES
电信集成电路类型:DIGITAL TIME SWITCH温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.4 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:28 mm
Base Number Matches:1

ZL50064 数据手册

 浏览型号ZL50064的Datasheet PDF文件第6页浏览型号ZL50064的Datasheet PDF文件第7页浏览型号ZL50064的Datasheet PDF文件第8页浏览型号ZL50064的Datasheet PDF文件第10页浏览型号ZL50064的Datasheet PDF文件第11页浏览型号ZL50064的Datasheet PDF文件第12页 
ZL50062/4  
Data Sheet  
Pinout Diagram: (as viewed through top of package)  
A1 corner identified by metallized marking  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
A
B
C
D
E
F
A0  
A1  
A2  
A3  
A4  
A5  
A10  
DS  
A6  
R/W  
A7  
CS  
A8  
IC_  
OPEN  
IC_  
OPEN  
IC_  
OPEN  
IC_  
OPEN  
IC_  
OPEN  
IC_  
OPEN  
IC_  
OPEN  
IC_  
OPEN  
BSTo0 BSTo1 BSTo2 BSTo3  
BSTo4 BSTo5 BSTo6 BSTo7  
A9  
ODE  
DTA  
RESET  
TDi  
TMS  
TDo  
LSTo0  
LSTo4  
LSTo8  
LSTo1  
LSTo5  
LSTo2  
LSTo6  
LSTo3  
LSTo7  
A11  
A12  
A13  
A14  
BSTo8 BSTo9 BSTo10 BSTo11 BORS IC_GND IC_GND IC_GND IC_GND TCK  
TRST  
LORS  
LSTo9 LSTo10 LSTo11  
BSTo12 BSTo13 BSTo14 BSTo15 VDD_IO VDD_IO VDD_  
VDD_  
VDD_  
VDD_ VDD_IO VDD_IO LSTo12 LSTo13 LSTo14 LSTo15  
CORE CORE CORE CORE  
BSTo16 BSTo17 BSTo18 BSTo19 VDD_IO VDD_  
CORE  
GND  
GND  
GND  
GND  
GND  
VDD_  
GND  
GND  
GND  
GND  
GND  
GND  
D1  
GND  
GND  
GND  
GND  
GND  
GND  
D0  
GND  
GND  
GND  
GND  
GND  
VDD_  
VDD_ VDD_IO LSTo16 LSTo17 LSTo18 LSTo19  
CORE  
G
H
J
BSTo20 BSTo21 BSTo22 BSTo23 VDD_IO GND  
BSTo24 BSTo25 BSTo26 BSTo27 VDD_IO GND  
GND VDD_IO LSTo20 LSTo21 LSTo22 LSTo23  
GND VDD_IO LSTo24 LST25 LSTo26 LSTo27  
BSTo28 BSTo29 BSTo30 BSTo31 VDD_  
CORE  
GND  
GND  
GND  
GND  
VDD_ LSTo28 LSTo29 LSTo30 LSTo31  
CORE  
K
L
BSTi0  
BSTi4  
BSTi8  
BSTi1  
BSTi5  
BSTi2  
BSTi6  
BSTi3  
VDD_  
CORE  
VDD_  
CORE  
LSTi0  
LSTi1  
LSTi5  
LSTi2  
LSTi6  
LSTi3  
LSTi7  
BSTi7 VDD_IO VDD_  
CORE CORE  
VDD_ VDD_IO LSTi4  
CORE CORE  
M
N
P
R
T
BSTi9 BSTi10 BSTi11 VDD_IO  
D3  
D7  
D2  
D6  
VDD_  
PLL  
NC  
VDD_IO LSTi8  
LSTi9 LSTi10 LSTi11  
BSTi12 BSTi13 BSTi14 BSTi15 BSTi16  
BSTi17 BSTi18 BSTi19 BSTi20 BSTi21  
BSTi22 BSTi23 BSTi24 BSTi25 BSTi26  
D5  
D4  
IC_  
OPEN  
IC_  
OPEN  
LSTi12 LSTi13 LSTi14 LSTi15 LSTi16  
D11  
D15  
D10  
D14  
D9  
D8  
C16o  
FP8o  
C8i  
FP16o LSTi17 LSTi18 LSTi19 LSTi20 LSTi21  
D13  
D12  
FP8i  
C8o  
LSTi22 LSTi23 LSTi24 LSTi25 LSTi26  
LSTi27 LSTi28 LSTi29 LSTi30 LSTi31  
BSTi27 BSTi28 BSTi29 BSTi30 BSTi31 IC_GND IC_GND IC_GND IC_GND  
Figure 3 - ZL50062 PBGA Connections (256 PBGA, 17mm x 17mm) Pin Diagram  
(as viewed through top of package)  
9
Zarlink Semiconductor Inc.  

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