Z538001VSC

更新时间： 2024-02-12 07:27:10

品牌	Logo	应用领域
ZILOG		总线控制器微控制器和处理器计算机
页数	文件大小	规格书
37页	456K
描述
SMALL COMPUTER SYSTEM INTERFACE (SCSI)

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数据手册

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Z538001VSC 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	LCC	包装说明：	QCCJ, LDCC44,.7SQ
针数：	44	Reach Compliance Code：	unknown
风险等级：	5.92	Is Samacsys：	N
地址总线宽度：	3	最大数据传输速率：	1.5 MBps
驱动器接口标准：	X3.131	外部数据总线宽度：	8
JESD-30 代码：	S-PQCC-J44	JESD-609代码：	e0
长度：	16.5862 mm	端子数量：	44
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装等效代码：	LDCC44,.7SQ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	峰值回流温度（摄氏度）：	240
电源：	5 V	认证状态：	Not Qualified
座面最大高度：	4.57 mm	子类别：	Bus Controllers
最大压摆率：	15 mA	最大供电电压：	5.25 V
最小供电电压：	4.75 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	16.5862 mm	uPs/uCs/外围集成电路类型：	BUS CONTROLLER, SCSI
Base Number Matches：	1

Z538001VSC 数据手册

ILOG

Z5380 SCSI

PRODUCT SPECIFICATION

Z5380 SCSI

SMALL COMPUTER

SYSTEM INTERFACE (SCSI)

FEATURES

■ Pin Compatible with the Industry Standard 5380

■ 40-Pin DIP or 44-Pin PLCC Package Styles

■ Low-Power CMOS

■ Supports Target and Initiator Roles

■ Arbitration Support

■ DMA or Programmed I/O Data Transfers

■ Supports Normal or Block Mode DMA

■ Memory or I/O Mapped CPU Interface

■ Asynchronous Interface (Supports 1.5 MB/s)

■ DirectSCSIBusInterfacewithOn-Board48mADrivers

GENERAL DESCRIPTION

The Z5380 SCSI (Small Computer System Interface) con-

troller is designed to implement the SCSI protocol as

defined by the ANSI X3.131-1986 standard, and is fully

compatible with the industry standard 5380. It is capable

of operating both as a Target and as an Initiator. Special

high-current open-drain outputs enable the Z5380 to di-

rectly interface to, and drive, the SCSI bus. The Z5380 has

the necessary interface hook-ups which allows the system

CPU to communicate with it like any other peripheral

device. The CPU can read from, or write to, the SCSI

registers which are addressed as standard or memory-

mapped I/Os (Figure 1).

detects a bus condition that requires attention. It also

supports arbitration and reselection. The Z5380 has the

proper hand-shake signals to support normal and block

mode DMA operations with most DMA controllers avail-

able (Figure 2).

Notes:

All Signals with a preceding front slash, "/", are active Low, e.g.,

B//W (WORD is active Low); /B/W (BYTE is active Low, only).

Power connections follow conventional descriptions below:

Connection

Circuit

Device

Power

Ground

V_CC

GND

V_DD

V_SS

The Z5380 increases the system performance by minimiz-

ingtheCPUinterventioninDMAoperationswhichtheSCSI

controls. The CPU is interrupted by the SCSI when it

PS97SCC0100

PS009101-0201

12 3 4 5 6 7...37

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Z5380P	ETC	Interface IC	获取价格
Z5380PSC	ZILOG	SCSI Bus Controller, CMOS, PDIP40, PLASTIC, DIP-40	获取价格
Z5380PSCXXXX	ZILOG	SCSI Bus Controller, CMOS, PDIP40, PLASTIC, DIP-40	获取价格
Z5380V	ETC	Interface IC	获取价格
Z5380VSC	ZILOG	SCSI Bus Controller, CMOS, PQCC44, PLASTIC, LCC-44	获取价格
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