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Z0109MN0

更新时间: 2024-11-25 17:01:19
品牌 Logo 应用领域
瑞能 - WEEN /
页数 文件大小 规格书
14页 315K
描述
Planar passivated sensitive gate four quadrant triac in a SOT223 (SC-73) surface-mountable plastic package intended for applications requiring enhanced immunity to noise and direct interfacing to logic level ICs and low power gate drivers.

Z0109MN0 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SMALL OUTLINE, R-PDSO-G4Reach Compliance Code:unknown
HTS代码:8541.30.00.80风险等级:5.34
其他特性:SENSITIVE GATE外壳连接:MAIN TERMINAL 2
配置:SINGLEJESD-30 代码:R-PDSO-G4
JESD-609代码:e3元件数量:1
端子数量:4封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
最大均方根通态电流:1 A断态重复峰值电压:600 V
表面贴装:YES端子面层:TIN
端子形式:GULL WING端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发设备类型:4 QUADRANT LOGIC LEVEL TRIAC

Z0109MN0 数据手册

 浏览型号Z0109MN0的Datasheet PDF文件第2页浏览型号Z0109MN0的Datasheet PDF文件第3页浏览型号Z0109MN0的Datasheet PDF文件第4页浏览型号Z0109MN0的Datasheet PDF文件第5页浏览型号Z0109MN0的Datasheet PDF文件第6页浏览型号Z0109MN0的Datasheet PDF文件第7页 
Z0109MN0  
4Q Triac  
15 September 2018  
Product data sheet  
1. General description  
Planar passivated sensitive gate four quadrant triac in a SOT223 (SC-73) surface-mountable  
plastic package intended for applications requiring enhanced immunity to noise and direct  
interfacing to logic level ICs and low power gate drivers.  
2. Features and benefits  
Direct interfacing to logic level ICs  
Enhanced current surge capability  
Enhanced noise immunity  
High blocking voltage capability  
Planar passivated for voltage ruggedness and reliability  
Sensitive gate in four quadrants  
Surface-mountable package  
Triggering in all four quadrants  
3. Applications  
General purpose low power motor control  
Home appliances  
Industrial process control  
Low power AC Fan controllers  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VDRM  
repetitive peak off-  
state voltage  
-
-
600  
V
IT(RMS)  
ITSM  
RMS on-state current  
full sine wave; Tsp ≤ 105 °C; Fig. 1;  
Fig. 2; Fig. 3  
-
-
-
-
-
-
-
-
1
A
non-repetitive peak on- full sine wave; Tj(init) = 25 °C;  
state current  
12.5  
13.8  
125  
A
tp = 20 ms; Fig. 4; Fig. 5  
full sine wave; Tj(init) = 25 °C;  
tp = 16.7 ms  
A
Tj  
junction temperature  
°C  
Static characteristics  
IGT gate trigger current  
VD = 12 V; IT = 0.1 A; T2+ G+;  
Tj = 25 °C; Fig. 9  
0.4  
-
10  
mA  
 
 
 
 

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