Z0103MA, Z0107MA,
Z0109MA
Sensitive Gate Triacs
Series
Silicon Bidirectional Thyristors
Designed for use in solid state relays, MPU interface, TTL logic and
any other light industrial or consumer application. Supplied in an
inexpensive TO−92 package which is readily adaptable for use in
automatic insertion equipment.
http://onsemi.com
TRIACS
1.0 AMPERE RMS
600 VOLTS
Features
• One−Piece, Injection−Molded Package
• Blocking Voltage to 600 V
• Sensitive Gate Triggering in Four Trigger Modes (Quadrants) for all
possible Combinations of Trigger Sources, and especially for Circuits
that Source Gate Drives
MT2
MT1
G
• All Diffused and Glassivated Junctions for Maximum Uniformity of
Parameters and Reliability
• Improved Noise Immunity (dv/dt Minimum of 10 V/msec at 110°C)
• Commutating di/dt of 1.6 A/msec at 110°C
• High Surge Current of 8 A
1
1
2
2
3
3
BENT LEAD
• These are Pb−Free Devices
STRAIGHT LEAD
BULK PACK
TAPE & REEL
AMMO PACK
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
TO−92 (TO−226AA)
Rating
Symbol Value
Unit
CASE 029
STYLE 12
Peak Repetitive Off-State Voltage
V
DRM,
600
1.0
8.0
V
(1)
(T = −40 to +125°C)
V
RRM
J
MARKING DIAGRAM
Sine Wave 50 to 60 Hz, Gate Open
On-State RMS Current
Full Cycle Sine Wave 50 to 60 Hz
I
A
A
T(RMS)
Z01
10xMA
YWW G
G
(T = +50°C)
C
Peak Non−Repetitive Surge Current
One Full Cycle, Sine Wave 60 Hz
I
TSM
(T = 110°C)
C
2
2
1
2 3
Circuit Fusing Considerations (t = 8.3 ms)
I t
0.35
1.0
A s
x
Y
WW
G
= 3,7,9
= Year
= Work Week
Average Gate Power (T = 80°C, t v 8.3 ms)
P
W
A
C
G(AV)
Peak Gate Current (t v 20 ms, T = +125°C)
I
1.0
J
GM
= Pb−Free Package
Operating Junction Temperature Range
T
J
−40 to
+125
°C
(Note: Microdot may be in either location)
Storage Temperature Range
T
stg
−40 to
+150
°C
PIN ASSIGNMENT
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1
2
3
Main Terminal 1
Gate
Main Terminal 2
1. V
and V
for all types can be applied on a continuous basis. Blocking
DRM
RRM
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
June, 2009− Rev. 2
Z0103MA/D