Datasheet > YW80C196NU50

YW80C196NU50

更新时间： 2024-11-14 12:21:23

品牌	Logo	应用领域
英特尔 - INTEL		微控制器
页数	文件大小	规格书
43页	331K
描述
8XC196NU COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

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数据手册

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YW80C196NU50 数据手册

PRELIMINARY

8XC196NU COMMERCIAL

CHMOS 16-BIT MICROCONTROLLER

■ 50 MHz Operation^†

■ Chip-select Unit

— 6 Chip-select Pins

■ 1 Mbyte of Linear Address Space

■ Optional 48 Kbytes of ROM

■ 1 Kbyte of Register RAM

— Dynamic Demultiplexed/Multiplexed

Address/Data Bus for Each

Chip Select

— Programmable Wait States

(0–3) for Each Chip Select

— Programmable Bus Width

(8- or 16-bit) for Each Chip Select

— Programmable Address Range for

Each Chip Select

■ Register-register Architecture

■ Footprint and Functionally Compatible

Upgrade for the 8XC196NP

■ 32 I/O Port Pins

■ 16 Prioritized Interrupt Sources

■ 4 External Interrupt Pins and NMI Pin

■ Event Processor Array (EPA) with

4 High-speed Capture/Compare

Channels

■ 2 Flexible 16-bit Timer/Counters with

■ Multiply and Accumulate Executes in

640 ns Using the 32-bit Hardware

Accumulator

Quadrature Counting Capability

■ 3 Pulse-width Modulator (PWM)

Outputs with High Drive Capability

■ 960 ns 32/16 Unsigned Division

■ Full-duplex Serial Port with Dedicated

■ 100-pin SQFP or 100-pin QFP Package

Baud-rate Generator

■ Complete System Development

■ Peripheral Transaction Server

Support

†

40 MHz standard; 50 MHz is Speed Premium

■ High-speed CHMOS Technology

The 8XC196NU is a member of Intel’s 16-bit MCS^®96 microcontroller family. The device features 1 Mbyte of

linear address space, a demultiplexed bus, and a chip-select unit. The external bus can dynamically switch

between multiplexed and demultiplexed operation.

February 1997

Order Number: 272644-004

12 3 4 5 6 7...43

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