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XR28V384IM48-0A PDF预览

XR28V384IM48-0A

更新时间: 2024-11-03 01:00:15
品牌 Logo 应用领域
艾科嘉 - EXAR PC先进先出芯片
页数 文件大小 规格书
42页 511K
描述
3.3V QUAD LPC UART WITH 128-BYTE FIFO

XR28V384IM48-0A 数据手册

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XR28V384  
3.3V QUAD LPC UART WITH 128-BYTE FIFO  
REV. 1.0.0  
NOVEMBER 2013  
FEATURES  
GENERAL DESCRIPTION  
x 128 Byte Transmit and Receive FIFO  
x Compliant to LPC 1.1 Specifications  
x -40°C to +85°C Industrial Temp Operation  
x Watchdog Timer with WDTOUT# signal  
x 4 Independent UART channels  
The XR28V384 (V384) is  
a
quad Universal  
Asynchronous Receiver and Transmitter (UART) for  
the Intel Low Pin Count (LPC) bus interface. This  
device can replace or supplement a Super I/O device  
to add additional serial ports to the system.  
The V384 UARTs support any 16-bit I/O address  
supported by the system. The register set is based on  
the industry standard 16550 UART, so the V384  
operates with the standard serial port drivers without  
requiring a custom driver to be installed.  
Programmable I/O mapped base addresses  
Data rates up to 3 Mbps  
Selectable RX FIFO interrupt trigger levels  
Auto RS-485 Half-Duplex Control mode  
The 128 byte Transmit and Receive FIFOs reduce  
CPU overhead and minimize the chance of buffer  
overflow and data loss. In addition to the 16550  
UART registers, there are also Configuration register  
set where enhanced features such as the 9-bit  
(multidrop) mode, IrDA mode and the Watchdog  
Timer can be enabled.  
Programmable character lengths (5, 6, 7, 8)  
with even, odd, or no parity  
IrDA mode and separate IRTXA# and IRRXA#  
pins for the first UART channel  
9-bit (Multidrop) mode  
x External 24MHz/48MHz clock  
x Single 3.3V Supply Voltage ( 10% )  
x 5V tolerant inputs  
The V384 is available in a 48-pin TQFP package.  
APPLICATIONS  
x Industrial and Embedded PCs  
x Factory Automation and Process Controls  
x Network Routers  
x 48-TQFP package (7mm x 7mm)  
x System Board Designs  
FIGURE 1. XR28V384 BLOCK DIAGRAM  
V C C  
G N D  
3 .3 V  
1 0 %  
T X A /P S _ 3 F 8 _ IR Q A  
IR T X A #  
R X A  
T X F IF O  
(IrD A E n c o d e r)  
B a u d  
R a te  
G e n e ra to r  
R X F IF O  
(IrD A D e co d e r)  
IR R X A #  
R T S A # /P S _ C O N F _ 2 E /R S 4 8 5  
S ta tu s a n d  
C o n tro l  
R e g is te rs  
P C IR S T #  
L C L K  
M o d e m  
IO s  
D T R A # /P S _ 3 E 0 _ IR Q A  
C T S A # , D S R A # , C D A # , R IA #  
L P C  
B u s  
In te rfa ce  
L F R A M E  
#
U A R T C h a n n e l A  
L A D [3 :0 ]  
S E R IR Q  
T X B /P S _ 2 F 8 _ IR Q B  
R X B  
B a u d  
R a te  
G e n e ra to r  
T X F IF O  
R X F IF O  
S ta tu s a n d  
C o n tro l  
R e g is te rs  
R T S B # /P S _ C O N F _ K E Y 1 /R S 4 8 5  
D T R B # /P S _ 2 E 0 _ IR Q B  
C T S B # , D S R B # , C D B # , R IB #  
M o d e m  
IO s  
G lo b a l  
C o n fig u ra tio n  
R e g is te rs  
U A R T C h a n n e l B  
T X C /P S _ 3 E 8 _ IR Q C  
R X C  
B a u d  
R a te  
G e n e ra to r  
T X F IF O  
R X F IF O  
W a tc h  
D o g  
T im e r  
S ta tu s a n d  
C o n tro l  
R e g iste rs  
W D T O U T  
#
R T S C # /P S _ C O N F _ K E Y 0 /R S 4 8 5  
D T R C # /P S _ W D T  
C T S C # , D S R C # , C D C # , R IC #  
M o d e m  
IO s  
U A R T C h a n n e l C  
T X D /P S _ 2 E 8 _ IR Q D  
R X D  
B a u d  
R a te  
G e n e ra to r  
T X F IF O  
R X F IF O  
C lo c k  
D iv id e r  
C L K I  
N
S ta tu s a n d  
C o n tro l  
R e g iste rs  
R T S D # /R S 4 8 5  
D T R D #  
M o d e m  
IO s  
C T S D # , D S R D # , C D D # ,  
R ID #  
U A R T C h a n n e l D  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  

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