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XQ4010E-3HQ208N PDF预览

XQ4010E-3HQ208N

更新时间: 2024-11-07 23:34:03
品牌 Logo 应用领域
赛灵思 - XILINX 现场可编程门阵列可编程逻辑时钟
页数 文件大小 规格书
36页 300K
描述
Field Programmable Gate Array (FPGA)

XQ4010E-3HQ208N 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:QFP包装说明:PLASTIC, QFP-208
针数:208Reach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.88Is Samacsys:N
其他特性:MAXIMUM USABLE GATES=20000最大时钟频率:125 MHz
CLB-Max的组合延迟:2.01 nsJESD-30 代码:S-PQFP-G208
JESD-609代码:e0长度:28 mm
湿度敏感等级:3可配置逻辑块数量:400
等效关口数量:7000输入次数:160
逻辑单元数量:950输出次数:160
端子数量:208最高工作温度:125 °C
最低工作温度:-55 °C组织:400 CLBS, 7000 GATES
封装主体材料:PLASTIC/EPOXY封装代码:HFQFP
封装等效代码:HQFP208,1.2SQ,20封装形状:SQUARE
封装形式:FLATPACK, HEAT SINK/SLUG, FINE PITCH峰值回流温度(摄氏度):225
电源:5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:4.1 mm子类别:Field Programmable Gate Arrays
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:28 mm
Base Number Matches:1

XQ4010E-3HQ208N 数据手册

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0
R
QPRO XQ4000E/EX  
QML High-Reliability FPGAs  
0
2
DS021 (v2.2) June 25, 2000  
Product Specification  
Product Features  
Certified to MIL-PRF-38535, appendix A QML  
(Qualified Manufacturers Listing)  
Configured by Loading Binary File  
Unlimited reprogrammability  
Readback Capability  
-
Also available under the following Standard Microcircuit  
Drawings (SMD)  
-
-
Program verification  
Internal node observability  
-
-
-
-
-
XC4005E  
XC4010E  
XC4013E  
XC4025E  
XC4028EX  
5962-97522  
5962-97523  
5962-97524  
5962-97525  
5962-98509  
Backward Compatible with XC4000 Devices  
Development System runs on most common computer  
platforms  
-
-
-
Interfaces to popular design environments  
Fully automatic mapping, placement and routing  
Interactive design editor for design optimization  
For more information contact the Defense Supply  
Center Columbus (DSCC)  
http://www.dscc.dla.mis/v/va/smd/smdsrch.html  
Available Speed Grades:  
System featured Field-Programmable Gate Arrays  
-
-
-
XQ4000E  
-3 for plastic packages only  
-4 for ceramic packages only  
TM  
-
Select-RAM memory: on-chip ultra-fast RAM with  
·
Synchronous write option  
XQ4028EX -4 for all packages  
·
Dual-port RAM option  
-
-
-
-
-
-
-
Abundant flip-flops  
More Information  
Flexible function generators  
Dedicated high-speed carry logic  
Wide edge decoders on each edge  
Hierarchy of interconnect lines  
Internal 3-state bus capability  
Eight global low-skew clock or signal distribution  
networks  
For more information refer to Xilinx XC4000E and XC4000X  
series Field Programmable Gate Arrays product specifica-  
tion. This data sheet contains pinout tables for XQ4010E  
only. Refer to Xilinx web site for pinout tables for other  
devices. (Pinouts for XQ4000E/EX are identical to  
XC4000E/EX.)  
(http://www.xilinx.com/partinfo/databook.htm)  
System Performance beyond 60 MHz  
Flexible Array Architecture  
Low Power Segmented Routing Architecture  
Systems-Oriented Features  
-
IEEE 1149.1-compatible boundary scan logic  
support  
-
-
-
Individually programmable output slew rate  
Programmable input pull-up or pull-down resistors  
12 mA sink current per XQ4000E/EX output  
© 2000 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS021 (v2.2) June 25, 2000  
www.xilinx.com  
1
Product Specification  
1-800-255-7778  

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