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XQ4000XL

更新时间： 2024-11-10 03:13:55
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赛灵思 - XILINX /
页数 文件大小 规格书
22页 169K
描述
QML High-Reliability FPGAs

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XQ4000XL 数据手册

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QPRO XQ4000XL Series QML  
High-Reliability FPGAs  
0
2
DS029 (v1.3) June 25, 2000  
Product Specification  
•
Development system runs on most common computer  
platforms  
XQ4000X Series Features  
•
Certified to MIL-PRF-38535 Appendix A QML  
(Qualified Manufacturer Listing)  
-
-
-
Interfaces to popular design environments  
Fully automatic mapping, placement and routing  
Interactive design editor for design optimization  
•
•
Ceramic and plastic packages  
Also available under the following standard microcircuit  
drawings (SMD)  
•
•
Highest capacity—over 180,000 usable gates  
Additional routing over XQ4000E  
-
-
-
-
XQ4013XL 5962-98513  
XQ4036XL 5962-98510  
XQ4062XL 5962-98511  
XQ4085XL 5962-99575  
-
Almost twice the routing capacity for high-density  
designs  
•
•
•
Buffered Interconnect for maximum speed  
New latch capability in configurable logic blocks  
•
For more information contact the Defense Supply  
Center Columbus (DSCC)  
Improved VersaRing™ I/O interconnect for better Fixed  
pinout flexibility  
http://www.dscc.dla.mis/v/va/smd/smdsrch.html  
-
Virtually unlimited number of clock signals  
•
•
Available in -3 speed  
•
Optional multiplexer or 2-input function generator on  
device outputs  
System featured Field-Programmable Gate Arrays  
-
SelectRAM™ memory: on-chip ultra-fast RAM with  
•
•
5V tolerant I/Os  
·
·
synchronous write option  
dual-port RAM option  
0.35 µm SRAM process  
-
-
-
-
-
-
-
Abundant flip-flops  
Introduction  
Flexible function generators  
Dedicated high-speed carry logic  
Wide edge decoders on each edge  
Hierarchy of interconnect lines  
Internal 3-state bus capability  
Eight global low-skew clock or signal distribution  
networks  
The QPRO™ XQ4000XL Series high-performance,  
high-capacity Field Programmable Gate Arrays (FPGAs)  
provide the benefits of custom CMOS VLSI, while avoiding  
the initial cost, long development cycle, and inherent risk of  
a conventional masked gate array.  
The result of thirteen years of FPGA design experience and  
feedback from thousands of customers, these FPGAs com-  
bine architectural versatility, on-chip Select-RAM memory  
with edge-triggered and dual-port modes, increased speed,  
abundant routing resources, and new, sophisticated  
soft-ware to achieve fully automated implementation of  
complex, high-density, high-performance designs.  
•
•
•
•
System performance beyond 50 MHz  
Flexible array architecture  
Low power segmented routing architecture  
Systems-oriented features  
-
IEEE 1149.1-compatible boundary scan logic  
support  
Refer to the complete Commercial XC4000XL Series Field  
Programmable Gate Arrays Data Sheet for more informa-  
tion on device architecture and timing, and the latest Xilinx  
databook for package pinouts other than the CB228  
(included in this data sheet). (Pinouts for XQ4000XL device  
are identical to XC4000XL.)  
-
-
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Individually programmable output slew rate  
Programmable input pull-up or pull-down resistors  
12 mA sink current per XQ4000XL output  
•
•
Configured by loading binary file  
Unlimited reprogrammability  
Readback capability  
-
-
-
Program verification  
Internal node observability  
© 2000 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS029 (v1.3) June 25, 2000  
www.xilinx.com  
1
Product Specification  
1-800-255-7778  
1234567...22

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