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XPC107APX66LC PDF预览

XPC107APX66LC

更新时间: 2024-11-30 05:04:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
52页 631K
描述
Multifunction Peripheral, CMOS, PBGA503, 33 X 33 MM, PLASTIC, BGA-503

XPC107APX66LC 数据手册

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Advance Information  
MPC107EC/D  
Rev. 4, 7/2003  
MPC107  
PCI Bridge/Memory Controller  
Hardware Specifications  
This document provides an overview of the MPC107 PCI bridge/memory controller  
(PCIB/MC) for high-performance embedded systems. The MPC107 is a cost-effective,  
general-purpose PCIB/MC for applications using PCI in networking infrastructure,  
telecommunications, and other embedded markets. It can be used in applications such as  
network routers and switches, mass storage subsystems, network appliances, and print and  
imaging systems.  
This document describes pertinent electrical and physical characteristics of the MPC107. For  
functional characteristics of the processor, refer to the MPC107 PCI Bridge/Memory  
Controller Users Manual (MPC107UM/D).  
This document contains the following topics:  
Topic  
Page  
1
Section 1.1, “Overview”  
Section 1.2, “Features”  
2
Section 1.3, “General Parameters”  
Section 1.4, “Electrical and Thermal Characteristics”  
Section 1.5, “Package Description”  
Section 1.6, “PLL Configuration”  
Section 1.7, “System Design Information”  
Section 1.8, “Document Revision History”  
Section 1.9, “Ordering Information”  
4
4
29  
37  
37  
44  
47  
To locate any published errata or updates for this document, refer to the web site at  
http://www.motorola.com/semiconductors.  
1.1 Overview  
The MPC107 integrates a PCI bridge, memory controller, DMA controller, PIC timers, a  
message unit with an Intelligent Input/Output (I O) message controller, and an  
2
2
Inter-Integrated Circuit (I C) controller. The integration reduces the overall packaging  
requirements and the number of discrete devices required for an embedded system.  
Figure 1 shows the major functional units within the MPC107. Note that this is a conceptual  
block diagram intended to show basic features rather than an attempt to show how these  
features are physically implemented.  

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