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XPC107APX66LD PDF预览

XPC107APX66LD

更新时间: 2024-02-17 02:18:10
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 时钟PC
页数 文件大小 规格书
52页 631K
描述
IC,PERIPHERAL (MULTIFUNCTION) CONTROLLER,CMOS,BGA,503PIN

XPC107APX66LD 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:BGA,
针数:503Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.83
地址总线宽度:32边界扫描:YES
总线兼容性:PCI; I2C; 60X PROCESSOR最大时钟频率:66 MHz
外部数据总线宽度:64JESD-30 代码:S-PBGA-B503
长度:33 mm湿度敏感等级:1
I/O 线路数量:64端子数量:503
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:2.75 mm最大供电电压:2.625 V
最小供电电压:2.375 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:33 mmBase Number Matches:1

XPC107APX66LD 数据手册

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Advance Information  
MPC107EC/D  
Rev. 4, 7/2003  
MPC107  
PCI Bridge/Memory Controller  
Hardware Specifications  
This document provides an overview of the MPC107 PCI bridge/memory controller  
(PCIB/MC) for high-performance embedded systems. The MPC107 is a cost-effective,  
general-purpose PCIB/MC for applications using PCI in networking infrastructure,  
telecommunications, and other embedded markets. It can be used in applications such as  
network routers and switches, mass storage subsystems, network appliances, and print and  
imaging systems.  
This document describes pertinent electrical and physical characteristics of the MPC107. For  
functional characteristics of the processor, refer to the MPC107 PCI Bridge/Memory  
Controller Users Manual (MPC107UM/D).  
This document contains the following topics:  
Topic  
Page  
1
Section 1.1, “Overview”  
Section 1.2, “Features”  
2
Section 1.3, “General Parameters”  
Section 1.4, “Electrical and Thermal Characteristics”  
Section 1.5, “Package Description”  
Section 1.6, “PLL Configuration”  
Section 1.7, “System Design Information”  
Section 1.8, “Document Revision History”  
Section 1.9, “Ordering Information”  
4
4
29  
37  
37  
44  
47  
To locate any published errata or updates for this document, refer to the web site at  
http://www.motorola.com/semiconductors.  
1.1 Overview  
The MPC107 integrates a PCI bridge, memory controller, DMA controller, PIC timers, a  
message unit with an Intelligent Input/Output (I O) message controller, and an  
2
2
Inter-Integrated Circuit (I C) controller. The integration reduces the overall packaging  
requirements and the number of discrete devices required for an embedded system.  
Figure 1 shows the major functional units within the MPC107. Note that this is a conceptual  
block diagram intended to show basic features rather than an attempt to show how these  
features are physically implemented.  

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