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XLMG3422R030RQZT PDF预览

XLMG3422R030RQZT

更新时间: 2023-06-19 15:36:08
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德州仪器 - TI 驱动驱动器
页数 文件大小 规格书
45页 1835K
描述
具有集成驱动器、保护和温度报告功能的 600V 30mΩ GaN FET | RQZ | 54 | -40 to 150

XLMG3422R030RQZT 数据手册

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LMG3422R030, LMG3425R030  
SNOSDA7C – AUGUST 2020 – REVISED DECEMBER 2021  
www.ti.com  
7 Specifications  
7.1 Absolute Maximum Ratings  
Unless otherwise noted: voltages are respect to GND(1)  
MIN  
MAX  
600  
UNIT  
V
VDS  
Drain-source voltage, FET off  
VDS(surge) Drain-source surge voltage, FET switching, surge condition(2)  
720  
V
VDS(tr)  
Drain-source surge transient ringing peak voltage, FET off, surge condition(2) (3)  
800  
V
(surge)  
VDD  
–0.3  
–0.3  
–16  
20  
5.5  
0.3  
V
V
V
V
V
LDO5V  
VNEG  
BBSW  
VVNEG–1 VVDD+0.5  
Pin voltage  
IN  
–0.3  
–0.3  
–0.3  
20  
VLDO5V+0.  
3
FAULT, OC, TEMP  
RDRV  
V
5.5  
55  
V
A
ID(RMS)  
ID(pulse)  
Drain RMS current, FET on  
Internally  
Limited  
Drain pulsed current, FET on, tp < 10 µs(4)  
–120  
A
IS(pulse)  
TJ  
Source pulsed current, FET off, tp < 1 µs  
Operating junction temperature(5)  
Storage temperature  
80  
150  
150  
A
–40  
–55  
°C  
°C  
Tstg  
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress  
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated  
under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device  
reliability.  
(2) See Section 9.3.3 for an explanation of the switching cycle drain-source voltage ratings.  
(3) t1 < 200 ns in Figure 9-1.  
(4) The positive pulsed current must remain below the overcurrent threshold to avoid the FET being automatically shut off. The FET drain  
intrinsic positive pulsed current rating for tp < 10 µs is 120 A.  
(5) Refer to the Electrical and Switching Characteristics Tables for junction temperature test conditions.  
7.2 ESD Ratings  
PARAMETER  
VALUE  
±2000  
±500  
UNIT  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2)  
V(ESD)  
Electrostatic discharge  
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
7.3 Recommended Operating Conditions  
Unless otherwise noted: voltages are respect to GND, SOURCE connected to GND  
MIN  
7.5  
0
NOM  
12  
MAX  
UNIT  
VDD  
Supply voltage  
(Maximum switching frequency derated  
for VVDD < 9 V)  
18  
V
Input voltage  
IN  
5
18  
40  
V
A
ID(RMS)  
Drain RMS current  
Positive source current  
LDO5V  
25  
mA  
kΩ  
uF  
RRDRV  
CVNEG  
RDRV to GND resistance from external slew-rate control resistor  
VNEG to GND capacitance from external bypass capacitor  
0
1
500  
10  
Copyright © 2021 Texas Instruments Incorporated  
Submit Document Feedback  
5
Product Folder Links: LMG3422R030 LMG3425R030  
 
 
 
 
 
 
 
 
 
 
 

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