Datasheet > XC9850VF

XC9850VF

更新时间： 2024-11-05 18:44:43

品牌	Logo	应用领域
艾迪悌 - IDT		时钟外围集成电路晶体
页数	文件大小	规格书
10页	317K
描述
Processor Specific Clock Generator, 500MHz, PBGA100, MAPBGA-100

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XC9850VF 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	MAPBGA-100	针数：	100
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.51
JESD-30 代码：	S-PBGA-B100	JESD-609代码：	e0
长度：	11 mm	端子数量：	100
最高工作温度：	85 °C	最低工作温度：	-40 °C
最大输出时钟频率：	500 MHz	封装主体材料：	PLASTIC/EPOXY
封装代码：	LBGA	封装形状：	SQUARE
封装形式：	GRID ARRAY, LOW PROFILE	峰值回流温度（摄氏度）：	225
主时钟/晶体标称频率：	250 MHz	认证状态：	Not Qualified
座面最大高度：	1.7 mm	最大供电电压：	3.465 V
最小供电电压：	3.135 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	TIN LEAD
端子形式：	BALL	端子节距：	1 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	30
宽度：	11 mm	uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches：	1

XC9850VF 数据手册

Freescale Semiconductor, Inc.

DATA SHEET

Order number: XC9850

MOTOROLA

Rev 0, 07/2004

Clo^Sc^Ek^MICG^Oe^NDn^Ue^CTr^Oa^Rto^TEr^CHf^No^ICr^AP^{L D}o^ATw^AerQUICC III

XC9850

Clock Generator for PowerQUICC III

The XC9850 is a PLL based clock generator specifically designed for

Motorola Microprocessor And Microcontroller applications including the

PowerQUICC III. This device generates a microprocessor input clock plus the

500 MHz Rapid I/O clock. The microprocessor clock is selectable in output

frequency to any of the commonly used microprocessor input and bus

frequencies. The Rapid I/O outputs are LVDS compatible. The device offers

eight low skew clock outputs organized into two output banks, each

configurable to support different clock frequencies. The extended temperature

range of the XC9850 supports telecommunication and networking

requirements.

MICROPROCESSOR

CLOCK GENERATOR

Features

•

8 LVCMOS outputs for processor and other circuitry

2 differential LVDS outputs for Rapid I/O interface

Crystal oscillator or external reference input

25 or 33 MHz Input reference frequency

SCALE 2:1

Selectable output frequencies include = 200, 166, 133,125, 111, 100, 83,

66, 50, 33 or 16 MHz

VF SUFFIX

VM SUFFIX (Pb-FREE)

100 MAPBGA PACKAGE

CASE 1462-01

•

Buffered reference clock output

Rapid I/O (LVDS) Output = 500, 250 or 125 MHz

Low cycle-to-cycle and period jitter

100-lead PBGA package

100-lead Pb-free Package Available

3.3V supply with 3.3V or 2.5V output LVCMOS drive

Supports computing, networking, telecommunications applications

Ambient temperature range –40°C to +85°C

Functional Description

The XC9850 uses either a 25 or 33 MHz reference frequency to generate 8 LVCMOS output clocks, of which, the frequency is

selectable from 16 MHz to 200 MHz. The reference is applied to the input of a PLL and multiplied to 2 GHz. Output dividers, divide

this frequency by 10, 12, 15, 16, 18, 20, 24, 30, 40, 60 or 120 to produce output frequencies of 200, 166, 133, 125, 111, 100, 83 66

50 33 or 16 MHz. The single-ended LVCMOS outputs are divided into two banks of 4 low skew outputs each, for use in driving a

microprocessor or microcontroller clock input as well as other system components. The 2 GHz PLL output frequency is also divided

to produce a 125, 250 or 500 MHz clock output for Rapid I/O applications such as found on the PowerQUICC III communications

processor. The input reference, either crystal or external input is also buffered to a separate output that my be used as the clock source

for a Gigabit Ethernet PHY if desired.

The reference clock may be provided by either an external clock input of 25 MHz or 33 MHz. An internal oscillator requiring a 25

MHz crystal for frequency control may also be used. The external clock source my be applied to either of two clock inputs and selected

via the CLK_SEL control input. Both single ended LVCMOS and differential LVPECL inputs are available. The crystal oscillator or

external clock input is selected via the input pin of REF_SEL. Other than the crystal, no external components are required for crystal

oscillator operation. The REF_33MHz configuration pins is used to select between a 33 and 25 MHz input frequency.

The XC9850 is packaged in a 100 lead MAPBGA package to optimize both performance and board density.

IDT™ Clock Generator for PowerQUICC III

XC9850

For More Information On This Product,

Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc

Go to: www.freescale.com

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与XC9850VF相关器件

型号	品牌	获取价格	描述	数据表
XC9850VM	IDT	获取价格	Processor Specific Clock Generator, 500MHz, PBGA100, LEAD FREE, MAPBGA-100
XC9850VM	NXP	获取价格	500MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA100, LEAD FREE, MAPBGA-100
XC9855VF	IDT	获取价格	Processor Specific Clock Generator, 200MHz, PBGA100, MAPBGA-100
XC9855VF	NXP	获取价格	500MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA100, MAPBGA-100
XC9855VM	NXP	获取价格	500MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA100, LEAD FREE, MAPBGA-100
XC9855VM	IDT	获取价格	Processor Specific Clock Generator, 200MHz, PBGA100, LEAD FREE, MAPBGA-100
XC9893FA	MOTOROLA	获取价格	PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48, LQFP-48
XC9A	OMRON	获取价格	XC9
XC9A-006S	OMRON	获取价格	XC9
XC9B	OMRON	获取价格	XC9

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