5秒后页面跳转
捷配首页

Datasheet > XC4013E-1TQ240I
XC4013E-1TQ240I PDF预览

XC4013E-1TQ240I

更新时间： 2024-11-10 22:08:59
品牌 Logo 应用领域
赛灵思 - XILINX 现场可编程门阵列栅
页数 文件大小 规格书
4页 25K
描述
XC4000E and XC4000X Series Field Programmable Gate Arrays

阅读下载

中文翻译

获取价格

XC4013E-1TQ240I 数据手册

 浏览型号XC4013E-1TQ240I的Datasheet PDF文件第2页浏览型号XC4013E-1TQ240I的Datasheet PDF文件第3页浏览型号XC4013E-1TQ240I的Datasheet PDF文件第4页 
XC4000E  
Logic Cell Array Family  
Product Preview  
Features  
Description  
The XC4000E family of Field-Programmable Gate Arrays  
(FPGAs) provides the benefits of custom CMOS VLSI,  
while avoiding the initial cost, time delay, and inherent risk  
of a conventional masked gate array.  
• Third Generation Field-Programmable Gate Arrays  
– On-chip ultra-fast RAM with synchronous write option  
– Dual-port RAM option  
– Fully PCI compliant  
– Abundant flip-flops  
The XC4000E family provides a regular, flexible, pro-  
grammable architecture of Configurable Logic Blocks  
(CLBs), interconnected by a powerful hierarchy of versa-  
tile routing resources, and surrounded by a perimeter of  
programmable Input/Output Blocks (IOBs).  
– Flexible function generators  
– Dedicated high-speed carry-propagation circuit  
– Wide edge decoders (four per edge)  
– Hierarchy of interconnect lines  
– Internal 3-state bus capability  
XC4000E devices have generous routing resources to  
accommodate the most complex interconnect patterns.  
They are customized by loading configuration data into  
the internal memory cells. The FPGA can either actively  
read its configuration data out of external serial or byte-  
parallel PROM (master modes), or the configuration data  
can be written into the FPGA (slave and peripheral  
modes).  
– 8 global low-skew clock or signal distribution network  
• Flexible Array Architecture  
– Programmable logic blocks and I/O blocks  
– Programmable interconnects and wide decoders  
• Sub-micron CMOS Process  
– High-speed logic and Interconnect  
– Low power consumption  
• Systems-Oriented Features  
The XC4000E family is supported by powerful and sophis-  
ticated software, covering every aspect of design: from  
schematic entry, to simulation, to automatic block place-  
ment and routing of interconnects, and finally the creation  
of the configuration bit stream.  
– IEEE 1149.1-compatible boundary-scan logic support  
– Programmable output slew rate (2 modes)  
– Programmable input pull-up or pull-down resistors  
– 12-mA sink current per output  
– 24-mA sink current per output pair  
FPGAs are ideal for shortening the design and develop-  
ment cycle, but they also offer a cost-effective solution for  
production rates well beyond 1,000 systems per month.  
• Configured by Loading Binary File  
– Unlimited reprogrammability  
– Six programming modes  
The XC4000E family is a superset of the popular XC4000  
family. For a detailed description of the device architec-  
ture, configuration methods, pin functionality, package  
pin-outs and dimensions, see the Xilinx Programmable  
Logic Data Book.  
• XACT Development System runs on ’386/’486/  
Pentium-type PC, Apollo, Sun-4, and Hewlett-Packard  
700 series  
– Interfaces to popular design environments like  
Viewlogic, Mentor Graphics and OrCAD  
– Fully automatic partitioning, placement and routing  
– Interactive design editor for design optimization  
– 288 macros, 34 hard macros, RAM/ROM compiler  
The following pages describes the new features of the  
XC4000E family and list electrical and timing parameters.  
Table 1. The XC4000E Family of Field-Programmable Gate Arrays  
Device  
XC4003E XC4005E  
XC4006E  
XC4008E XC4010E  
XC4013E  
XC4020E XC4025E  
Appr. Gate Count  
CLB Matrix  
Number of CLBs  
Number of Flip-Flops  
Max Decode Inputs (per side)  
Max RAM Bits  
3,000  
10 x 10  
100  
360  
30  
5,000  
14 x 14  
196  
616  
42  
6,000  
16 x 16  
256  
768  
48  
8,000  
18 x 18  
324  
936  
54  
10,000  
20 x 20  
400  
1,120  
60  
13,000  
24 x 24  
576  
1,536  
72  
20,000  
28 x 28  
784  
2,016  
84  
25,000  
32 x 32  
1,024  
2,560  
96  
3,200  
80  
6,272  
112  
8,192  
128  
10,368  
144  
12,800  
160  
18,432  
192  
25,088  
224  
32,768  
256  
Number of IOBs  
1
1234

中文翻译

下载PDF

与XC4013E-1TQ240I相关器件

型号 品牌 获取价格 描述 数据表
XC4013E-1TQ240M XILINX

获取价格

 		XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-1VQ240C XILINX

获取价格

 		XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-1VQ240I XILINX

获取价格

 		XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-1VQ240M XILINX

获取价格

 		XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-2BG225C ETC

获取价格

 		Field Programmable Gate Array (FPGA)
XC4013E-2BG225I ETC

获取价格

 		Field Programmable Gate Array (FPGA)
XC4013E-2BG240C XILINX

获取价格

 		XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-2BG240I XILINX

获取价格

 		XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-2BG240M XILINX

获取价格

 		XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-2BGG225C XILINX

获取价格

 		Field Programmable Gate Array, 576 CLBs, 10000 Gates, 125MHz, CMOS, PBGA225, PLASTIC, BGA-

与XC4013E-1TQ240I相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证