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XC3S200-4FG1156C PDF预览

XC3S200-4FG1156C

更新时间: 2024-11-08 03:01:35
品牌 Logo 应用领域
赛灵思 - XILINX 现场可编程门阵列可编程逻辑
页数 文件大小 规格书
192页 1695K
描述
Spartan-3 FPGA Family : Complete Data Sheet

XC3S200-4FG1156C 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:BGA,针数:1156
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.75Is Samacsys:N
JESD-30 代码:S-PBGA-B1156长度:35 mm
可配置逻辑块数量:192等效关口数量:50000
端子数量:1156最高工作温度:85 °C
最低工作温度:组织:192 CLBS, 50000 GATES
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY认证状态:Not Qualified
座面最大高度:2.6 mm最大供电电压:1.26 V
最小供电电压:1.14 V标称供电电压:1.2 V
表面贴装:YES温度等级:OTHER
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM宽度:35 mm
Base Number Matches:1

XC3S200-4FG1156C 数据手册

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Spartan-3 FPGA Family:  
Complete Data Sheet  
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DS099 July 13, 2004  
Advance Product Specification  
This document includes all four modules of the Spartan™-3 FPGA data sheet.  
Module 1:  
Introduction and Ordering Information  
Module 3:  
DC and Switching Characteristics  
DS099-1 (v1.2) December 24, 2003  
6 pages  
DS099-3 (v1.3) March 4, 2004  
40 pages  
Introduction  
DC Electrical Characteristics  
-
-
-
-
Absolute Maximum Ratings  
Supply Voltage Specifications  
Recommended Operating Conditions  
DC Characteristics  
Features  
Architectural Overview  
Product Availability  
User I/O Chart  
Switching Characteristics  
Ordering Information  
-
-
-
-
I/O Timing  
Core Logic Timing  
DCM Timing  
Module 2:  
Functional Description  
DS099-2 (v1.2) July 11, 2003  
40 pages  
Configuration and JTAG Timing  
Module 4:  
Pinout Descriptions  
DS099-4 (v1.5) July 13, 2004  
106 pages  
IOBs  
-
-
IOB Overview  
SelectIO™ Signal Standards  
CLB Overview  
Pin Descriptions  
Pin Behavior During Configuration  
Block RAM  
Dedicated Multipliers  
Digital Clock Manager (DCM)  
-
Package Overview  
Pinout Tables  
-
Clock Network  
-
Footprints  
Configuration  
IMPORTANT NOTE: The Spartan-3 FPGA data sheet is created and published in separate modules. This complete version  
is provided for easy downloading and searching of the complete document. Page, figure, and table numbers begin at 1 for  
each module, and each module has its own Revision History at the end. Use the PDF "Bookmarks" for easy navigation in  
this volume.  
© 2003-2004 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS099 July 13, 2004  
www.xilinx.com  
Advance Product Specification  
1-800-255-7778  

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