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Spartan-IIE FPGA Family
Data Sheet
DS077 June 18, 2008
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Product Specification
This document includes all four modules of the Spartan®-IIE FPGA data sheet.
Module 1:
Introduction and Ordering Information
Module 3:
DC and Switching Characteristics
DS077-1 (v2.3) June 18, 2008
DS077-3 (v2.3) June 18, 2008
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Introduction
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DC Specifications
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Absolute Maximum Ratings
Recommended Operating Conditions
DC Characteristics
Power-On Requirements
DC Input and Output Levels
Features
General Overview
Product Availability
User I/O Chart
Ordering Information
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Switching Characteristics
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Pin-to-Pin Parameters
Module 2:
IOB Switching Characteristics
Clock Distribution Characteristics
DLL Timing Parameters
CLB Switching Characteristics
Block RAM Switching Characteristics
TBUF Switching Characteristics
JTAG Switching Characteristics
Configuration Switching Characteristics
Functional Description
DS077-2 (v2.3) June 18, 2008
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Architectural Description
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Spartan-IIE Array
Input/Output Block
Configurable Logic Block
Block RAM
Clock Distribution: Delay-Locked Loop
Boundary Scan
Module 4:
Pinout Tables
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Development System
Configuration
DS077-4 (2.3) June 18, 2008
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Pin Definitions
Pinout Tables
IMPORTANT NOTE: The Spartan-IIE FPGA data sheet is in four modules. Each module has its own Revision History at the
end. Use the PDF "Bookmarks" for easy navigation in this volume.
© 2003-2008 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other
trademarks are the property of their respective owners.
DS077 June 18, 2008
www.xilinx.com
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Product Specification