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XBOX360 PDF预览

XBOX360

更新时间: 2024-11-24 00:04:23
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德州仪器 - TI /
页数 文件大小 规格书
67页 1051K
描述
xbox360 cir

XBOX360 数据手册

 浏览型号XBOX360的Datasheet PDF文件第2页浏览型号XBOX360的Datasheet PDF文件第3页浏览型号XBOX360的Datasheet PDF文件第4页浏览型号XBOX360的Datasheet PDF文件第5页浏览型号XBOX360的Datasheet PDF文件第6页浏览型号XBOX360的Datasheet PDF文件第7页 
SCHEMATIC  
K6  
REV  
PB NUMBER  
X803600-011  
VER  
RETAIL  
BOM RELEASE DATE  
XX/XX/XX  
PAGE  
CONTENTS  
PAGE  
CONTENTS  
[1]  
[2]  
COVER PAGE  
CLOCK DIAGRAM  
RESET/ENABLE  
[33]  
[34]  
[35]  
[36]  
[37]  
[38]  
[39]  
[40]  
[41]  
[42]  
[43]  
[44]  
[45]  
[46]  
[47]  
[48]  
[49]  
[50]  
[51]  
[52]  
[53]  
[54]  
[55]  
[56]  
[57]  
[58]  
[59]  
[60]  
[61]  
[62]  
[63]  
[64]  
SB, PCIEX + SMM GPIO + JTAG  
SB, SMC  
SB, FLASH + USB + SPI  
SB, ETHERNET + AUDIO + SATA  
SB, STANDBY POWER + DECOUPLE  
SB, MAIN POWER + DECOUPLE  
SB OUT, ETHERNET  
SB OUT, AUDIO  
SB OUT, FLASH  
SB OUT, FAN + INFRARED + BUTTONS  
CONN, AVIP  
CONN, RJ45 + USB COMBO  
CONN, GAME PORTS + MEMORY PORTS  
BACKUP CLOCK + V_5P0 DUAL  
CONN, ODD AND HDD  
CONN, ARGON + POWER  
VREGS, INPUT + OUTPUT FILTERS  
VREGS, CPU CONTROLLER  
VREGS, GPU OUTPUT PHASE 1,2,3  
VREGS, GPU CONTROLLER  
VREGS, GPU OUTPUT PHASE 1,2  
[3]  
DIAGRAM  
[4]  
CPU, CLOCKS + EEPROM + STRAPPING  
CPU, FSB  
[5]  
[6]  
CPU, FSB POWER + PLL POWER  
CPU, CORE POWER  
[7]  
[8]  
CPU, POWER  
XENON  
[9]  
CPU, DECOUPLING  
[10]  
[11]  
[12]  
[13]  
[14]  
[15]  
[16]  
[17]  
[18]  
[19]  
[20]  
[21]  
[22]  
[23]  
[24]  
[25]  
[26]  
[27]  
[28]  
[29]  
[30]  
[31]  
[32]  
CPU, DECOUPLING  
CPU, DECOUPLING  
RETAIL  
REV K6  
FAB K  
GPU, FSB  
GPU, VIDEO + PCIEX + EEPROM  
GPU, MEMORY CONTROLLER A + B  
GPU, MEMORY CONTROLLER C + D  
GPU, PLL POWER + FSB POWER  
GPU, CORE POWER + MEM POWER  
GPU, DECOUPLING  
DUAL ETHERNET PHY  
MEMORY, A (TOP)  
MEMORY, A MIRRORED (BOTTOM)  
MEMORY, B (TOP)  
VREGS, SWITCHED 1.8,  
5.0V  
MEMORY, B MIRRORED (BOTTOM)  
MEMORY, C (TOP)  
VREGS, LINEAR REGULATORS  
XDK, DEBUG CONN  
MEMORY, C MIRRORED (BOTTOM)  
MEMORY, D (TOP)  
MEMORY, D MIRRORED (BOTTOM)  
ANA, CLOCKS + STRAPPING  
ANA, VIDEO + FAN + JTAG  
ANA, POWER + DECOUPLING  
DEBUG BOARD, CPU + GPU BREAKOUT  
DEBUG BOARD, CPU CONN  
DEBUG BOARD, CPU CONN + TERM  
DEBUG BOARD, CPU TERM  
DEBUG BOARD, TITAN + YETI CONN  
DEBUG BOARD, GPU CONN + TERM  
XDK, LEDS  
DEBUG MAPPING,  
POWER TRACE EMI CAPS  
WN DBG VS WN XDK  
LABELS AND MOUNTING  
RULES:  
(APPLIED  
WHEN POSSIBLE)  
1.)  
2.)  
MSB TO LSB IS TOP TO BOTTOM  
WHEN POSSIBLE: INPUTS ON LEFT,  
ORDER OF PAGES=CHIP INTERFACES,  
AVOID USING OFF PAGE CONNECTORS FOR ON PAGE CONNECTIONS  
LANED SIGNALS ARE GROUPED ON SYMBOLS  
TRANSIMITTER NAME USED AS PREFIX WITH RX AND TX CONNECTIONS  
SUFFIX V_ IS USED FOR VOLTAGE RAIL SIGNAL NAMES  
SUFFIX _DP AND _DN ARE USED FOR DIFFERIENTAL PAIRS  
XENON  
OUTPUTS ON RIGHT  
TERMINATION, POWER, DECOUPLING  
3.)  
PLEASE REFER TO THE XENON DESIGN SPEC  
4.)  
5.)  
6.)  
7.)  
8.)  
PB NUMBER X803600-011  
BOM RELEASE DATE  
SIGNATURE  
DRN BY  
XX/XX/XX  
DATE  
9.)  
UNNAMED NETS ARE NAMED WITH /2 TEXT SIZE  
10.)  
12.)  
13.)  
14.)  
15.)  
SUFFIX  
SUFFIX  
SUFFIX  
'CLK'  
_N FOR ACTIVE  
_P FOR JUNCTION  
_EN FOR ENABLE  
FOR CLOCKS, 'RST'  
LOW OR  
N
JUNCTION  
P
MICROSOFT XBOX  
SCH, PBA, XENON  
FOR RESETS  
TITLE  
CHK BY  
PWRGD FOR POWER GOOD  
ENGR  
APVD  
DRAWING  
PROJECT NAME  
XENON_RETAIL  
PAGE  
1/73  
REV  
K6  
XENON_FABK  
APVD  
APVD  
MICROSOFT  
Wed Aug 03 14:52:12  
2005  
[PAGE_TITLE=COVER  
PAGE]  
CONFIDENTIAL  

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