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XB1009-BD PDF预览

XB1009-BD

更新时间: 2022-04-23 23:00:11
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MIMIX 缓冲放大器
页数 文件大小 规格书
7页 273K
描述
14.0-30.0 GHz GaAs MMIC Buffer Amplifier

XB1009-BD 数据手册

 浏览型号XB1009-BD的Datasheet PDF文件第1页浏览型号XB1009-BD的Datasheet PDF文件第2页浏览型号XB1009-BD的Datasheet PDF文件第3页浏览型号XB1009-BD的Datasheet PDF文件第4页浏览型号XB1009-BD的Datasheet PDF文件第6页浏览型号XB1009-BD的Datasheet PDF文件第7页 
14.0-30.0 GHz GaAs MMIC  
Buffer Amplifier  
February 2007 - Rev 05-Feb-07  
B1009-BD  
App Note [1] Biasing - It is recommended to separately bias each amplifier stage Vd1 through Vd2 at Vd(1,2)=5.0V with Id1=80 mA and  
Id2=240 mA. Separate biasing is recommended if the amplifier is to be used at high levels of saturation, where gate rectification will alter the  
effective gate control voltage. For non-critical applications it is possible to parallel all stages and adjust the common gate voltage for a total drain  
current Id(total)=320 mA. It is also recommended to use active biasing to keep the currents constant as the RF power and temperature vary; this  
gives the most reproducible results. Depending on the supply voltage available and the power dissipation constraints, the bias circuit may be a  
single transistor or a low power operational amplifier, with a low value resistor in series with the drain supply used to sense the current.The gate of  
the pHEMT is controlled to maintain correct drain current and thus drain voltage.The typical gate voltage needed to do this is -0.6V.Typically the  
gate is protected with Silicon diodes to limit the applied voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is  
available before applying the positive drain supply.  
App Note [2] Bias Arrangement -  
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the drain or gate pad DC bypass  
capacitors (~100-200 pF) can be combined. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or combination (if gate or  
drains are tied together) of DC bias pads.  
For Individual Stage Bias (Recommended for saturated applications) -- Each DC pad (Vd1,2 and Vg1,2) needs to have DC bypass capacitance  
(~100-200 pF) as close to the device as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.  
MTTF Graphs  
These numbers were calculated based on accelerated life test information and thermal model analysis received from the fabricating foundry.  
XB1009-BD Vd1,2=5.0 V Id1,2=320 mA  
XB1009-BD Vd1,2=5.0 V Id1,2=320 mA  
1.0E+10  
1.0E+09  
1.0E+08  
1.0E+07  
1.0E+06  
1.0E+05  
1.0E+04  
1.0E+05  
1.0E+04  
1.0E+03  
1.0E+02  
1.0E+01  
1.0E+00  
55  
65  
75  
85  
95  
105  
115  
125  
55  
65  
75  
85  
95  
105  
115  
125  
Backplate Temperature (deg C)  
Backplate Temperature (deg C)  
No RF  
Pout=+21 dBm  
No RF  
Pout=+21 dBm  
XB1009-BD Vd1,2=5.0 V Id1,2=320 mA  
XB1009-BD Vd1,2=5.0 V Id1,2=320 mA  
44  
250  
230  
210  
190  
170  
150  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
55  
130  
55  
65  
75  
85  
95  
105  
115  
125  
65  
75  
85  
95  
105  
115  
125  
Backplate Temperature (deg C)  
Backplate Temperature (deg C)  
No RF  
Pout=+21 dBm  
No RF  
Pout=+21 dBm  
Page 5 of 7  
Mimix Broadband, Inc., 10795 Rockley Rd., Houston,Texas 77099  
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com  
Characteristic Data and Specifications are subject to change without notice. ©2007 Mimix Broadband, Inc.  
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept  
their obligation to be compliant with U.S. Export Laws.  

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