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X9430WV24 PDF预览

X9430WV24

更新时间: 2024-01-13 11:34:32
品牌 Logo 应用领域
英特矽尔 - INTERSIL 电位器运算放大器
页数 文件大小 规格书
21页 326K
描述
Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier

X9430WV24 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.64Base Number Matches:1

X9430WV24 数据手册

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X9430  
®
Programmable Analog  
March 11, 2005  
FN8198.0  
PR
DESCRIPTION  
Dual Digitally Controlled Potentiometer  
(XDCP™) with Operational Amplifier  
The X9430 is a monolithic CMOS IC that incorporates  
two operational amplifiers and two nonvolatile digitally  
controlled potentiometers. The amplifiers are CMOS  
differential input voltage operational amplifiers with  
near rail-to-rail outputs. All pins for the two amplifiers  
are brought out of the package to allow combining  
them with the potentiometers or using them as com-  
plete stand-alone amplifiers.  
FEATURES  
• Two CMOS voltage operational amplifiers  
• Two digitally controlled potentiometers  
• Can be combined or used separately  
• Amplifiers  
—Low voltage operation  
—V+/V- = ±2.7V to ±5.5V  
The digitally controlled potentiometers consist of a  
series string of 63 polycrystalline resistors that behave  
as standard integrated circuit resistors. The SPI serial  
port, common to both pots, allows the user to program  
the connection of the wiper output to any of the resis-  
tor nodes in the series string. The wiper position is  
saved in the on board E2 memory to allow for nonvola-  
tile restoration of the wiper position.  
—Rail-to-rail CMOS performance  
—1MHz gain bandwidth product  
• Digitally controlled potentiometer  
—Dual 64 tap potentiometers  
—R  
= 10k  
total  
SPI serial interface  
—V = 2.7V to 5.5V  
CC  
A wide variety of applications can be implemented  
using the potentiometers and the amplifiers. A typical  
application is to implement the amplifier as a wiper  
buffer in circuits that use the potentiometer as a voltage  
reference. The potentiometer can also be combined  
with the amplifier yielding a digitally programmable gain  
amplifier or programmable current source.  
BLOCK DIAGRAM  
VCC  
RW0 RH0 RL0  
V+  
HOLD  
VNI0  
Control and  
Memory  
+
VOUT0  
CS  
SCK  
SO  
SI  
A1  
A0  
WCR0  
VINV0  
VNI1  
+
VOUT1  
WCR1  
VINV1  
WP  
RW1 RL1 RH1  
VSS  
V-  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

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