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X84128I

更新时间: 2024-11-14 03:15:03
品牌 Logo 应用领域
ICMIC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
22页 564K
描述
Advanced MPS⑩ Micro Port Saver EEPROM with Block Lock⑩ Protection

X84128I 数据手册

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TM  
Preliminary Information  
ICmic  
This X84160/640/128 device has been acquired by  
IC MICROSYSTEMS from Xicor, Inc.  
IC MICROSYSTEMS  
16K/64K/128K  
MPSTM EEPROM  
X84160/640/128  
Advanced MPS™ Micro Port Saver EEPROM with Block Lock™ Protection  
FEATURES  
bytewide memory control functions, takes a fraction of  
the board space and consumes much less power.  
•Up to 15MHz data transfer rate  
Replacing serial memories, the µPort Saver provides all the  
•20ns Read Access Time  
serial benefits, such as low cost, low power, low voltage,  
•Direct Interface to Microprocessors and  
Microcontrollers  
—Eliminates I/O port requirements  
and small package size while releasing I/Os for more  
important uses.  
The µPort Saver memory outputs data within 20ns of an  
active read signal. This is less than the read access time  
—No interface glue logic required  
—Eliminates need for parallel to serial converters  
of most hosts and provides “no-wait-state” operation. This  
prevents bottlenecks on the bus. With rates to  
•Low Power CMOS  
—1.8V–3.6V, 2.5V–5.5V and 5V 10% Versions  
—Standby Current Less than 1µA  
15MHz, the µPort Saver supplies data faster than  
required by most host read cycle specifications. This  
eliminates the need for software NOPs.  
Active Current Less than 1mA  
•Byte or Page Write Capable  
—32-Byte Page Write Mode  
The µPort Saver memories communicate over one line of the  
data bus using a sequence of standard bus read and  
•New Programmable Block Lock™ Protection  
—Software Write Protection  
—Programmable Hardware Write Protection  
write operations. This “bit serial” interface allows the  
µPort Saver to work well in 8-bit, 16 bit, 32-bit, and 64-bit  
systems.  
•Block Lock (0, 1/4, 1/2, or all of the array)  
•Typical Nonvolatile Write Cycle Time: 3ms  
The X84160/640/128 provide additional data security  
features through Block Lock and programmable Hardware  
Write Protection. These allow some or all of the array to  
be write protected by software command or by hardware.  
System Configuration, Company ID, calibration information,  
or other critical data can be secured against unexpected  
or inadvertent program operations, leaving the remainder  
of the memory available for the system or user access  
High Reliability  
—100,000 Endurance Cycles  
—Guaranteed Data Retention: 100 Years  
•Small Package Options  
—8-Lead Mini-DIP Package  
—8, 14-Lead SOIC Packages  
—8, 20, 28-Lead TSSOP Packages  
—8-Lead XBGA Packages  
A Write Protect (WP) pin prevents inadvertent writes to the  
memory.  
DESCRIPTION  
Xicor EEPROMs are designed and tested for  
applications requiring extended endurance. Inherent data  
retention is greater than 100 years.  
The µPort Saver memories need no serial ports or special  
hardware and connect to the processor memory bus.  
Replacing bytewide data memory, the µPort Saver uses  
BLOCK DIAGRAM  
System Connection  
Internal Block Diagram MPS  
H.V. GENERATION  
TIMING & CONTROL  
WP  
A15  
µP  
µC  
A0  
D7  
DSP  
ASIC  
CE  
I/O  
OE  
EEPROM  
ARRAY  
COMMAND  
DECODE  
RISC  
X
DEC  
D0  
AND  
CONTROL  
LOGIC  
16K x 8  
8K x 8  
2K x 8  
P0/CS  
OE  
P1/CLK  
P2/DI  
P3/DO  
Ports  
Saved  
WE  
WE  
Y DECODE  
DATA REGISTER  
©
Xicor, Inc. 1998 Patents Pending  
7067 1.1 6/10/98 T10/C0/D3  
Characteristics subject to change without notice  
1

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