ISO 7816 Compatible
1K
128 x 8 bit
X76F102
Secure SerialFlash
FEATURES
DESCRIPTION
• 64-bit Password Security
• One Array (112 Bytes)Two Passwords (16 Bytes)
—Read Password
—Write Password
• Programmable Passwords
• Retry Counter Register
—Allows 8 tries before clearing of the array
• 32-bit Response to Reset (RST Input)
• 8 byte Sector Write mode
• 1MHz Clock Rate
The X76F102 is a Password Access Security Supervisor,
containing one 896-bit Secure SerialFlash array. Access
to the memory array can be controlled by two 64-bit
passwords. These passwords protect read and write
operations of the memory array.
The X76F102 features a serial interface and software
protocol allowing operation on a popular two wire bus.
The bus signals are a clock Input (SCL) and a bidirec-
tional data input and output (SDA).
• 2 wire Serial Interface
• Low Power CMOS
—2.0 to 5.5V operation
—Standby current Less than 1µA
—Active current less than 3 mA
• High Reliability Endurance:
—100,000 Write Cycles
• Data Retention: 100 years
• Available in:
The X76F102 also features a synchronous response to
reset providing an automatic output of a hard-wired 32-bit
data stream conforming to the industry standard for
memory cards.
TM
The X76F102 utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 100,000 cycles
and a minimum data retention of 100 years.
—8 lead PDIP, SOIC, MSOP, TSSOP, and Smart
Card Module
FUNCTIONAL DIAGRAM
Retry Counter
CS
CHIP ENABLE
8K BYTE
SerialFlash ARRAY
ARRAY 0
(PASSWORD PROTECTED)
DATA TRANSFER
Data Transfer
SCL
SCL
Erase Logic
SDA
ARRAY ACCESS
Array Access
SDA
INTERFACE
Interface
ENABLE
Enable
LOGIC
Logic
32 BYTE
112 Byte
SerialFlash ARRAY
EEPROM Array
(PASSWORD PROTECTED)
ARR Y 1
PASSWORD ARRAY
Password Array
AND PASSWORD
and Password
VERIFICATION LOGIC
Verification Logic
RST
RST
RESET
RETRY COUNTER
ISO Reset
RESPONSE REGISTER
Response Register
7025 FM 01
Xicor, Inc. 1999 Patents Pending
9900-5004.2 1/26/99 EP
Characteristics subject to change without notice
1