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X5328S8I

更新时间： 2024-09-15 22:41:23
品牌 Logo 应用领域
英特矽尔 - INTERSIL 光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
21页 339K
描述
CPU Supervisor with 32Kbit SPI EEPROM

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X5328S8I 数据手册

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X5328, X5329  
®
(Replaces X25328, X25329)  
Data Sheet  
October 17, 2005  
FN8132.1  
DESCRIPTION  
CPU Supervisor with 32Kbit SPI EEPROM  
These devices combine three popular functions, Power-  
on Reset Control, Supply Voltage Supervision, and Block  
Lock Protect Serial EEPROM Memory in one package.  
This combination lowers system cost, reduces board  
space requirements, and increases reliability.  
FEATURES  
• Low V detection and reset assertion  
CC  
—Five standard reset threshold voltages  
—Re-program low V reset threshold voltage  
CC  
using special programming sequence  
Applying power to the device activates the power-on  
reset circuit which holds RESET/RESET active for a  
period of time. This allows the power supply and oscilla-  
tor to stabilize before the processor can execute code.  
—Reset signal valid to V = 1V  
CC  
• Long battery life with low power consumption  
—<1µA max standby current  
—<400µA max active current during read  
• 32Kbits of EEPROM  
The device’s low V  
detection circuitry protects the  
CC  
• Built-in inadvertent write protection  
—Power-up/power-down protection circuitry  
—Protect 0, 1/4, 1/2 or all of EEPROM array with  
user’s system from low voltage conditions by holding  
RESET/RESET active when V falls below a mini-  
CC  
mum V trip point. RESET/RESET remains asserted  
CC  
™
Block Lock protection  
until V  
returns to proper operating level and stabi-  
CC  
—In circuit programmable ROM mode  
• 2MHz SPI interface modes (0,0 & 1,1)  
• Minimize EEPROM programming time  
—32-byte page write mode  
lizes. Five industry standard V  
thresholds are  
TRIP  
available, however, Intersil’s unique circuits allow the  
threshold to be reprogrammed to meet custom  
requirements or to fine-tune the threshold in applica-  
tions requiring higher precision.  
—Self-timed write cycle  
—5ms write cycle time (typical)  
• 2.7V to 5.5V and 4.5V to 5.5V power supply  
operation  
• Available packages  
—14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP  
• Pb-free plus anneal available (RoHS compliant)  
BLOCK DIAGRAM  
WP  
Protect Logic  
SI  
Data  
Status  
Register  
Register  
SO  
Command  
Decode &  
Control  
SCK  
CS  
8Kbits  
8Kbits  
Logic  
16Kbits  
Reset  
Timebase  
RESET/RESET  
Power-on and  
Low Voltage  
Reset  
VCC  
+
-
Generation  
X5328 = RESET  
X5329 = RESET  
VTRIP  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  
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X5328S8I 替代型号

型号 品牌 替代类型 描述 数据表
X5328S8IZ INTERSIL

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 CPU Supervisor with 32Kbit SPI EEPROM

与X5328S8I相关器件

型号 品牌 获取价格 描述 数据表
X5328S8I-2.7 XICOR

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 		Power Supply Support Circuit, Adjustable, 1 Channel, PDSO8, PLASTIC, SOIC-8
X5328S8I-2.7A INTERSIL

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 		CPU Supervisor with 32Kbit SPI EEPROM
X5328S8I-2.7A RENESAS

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 		1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, PLASTIC, SOIC-8
X5328S8I-4.5A RENESAS

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 		1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, PLASTIC, SOIC-8
X5328S8I-4.5A INTERSIL

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 		CPU Supervisor with 32Kbit SPI EEPROM
X5328S8IZ INTERSIL

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 		CPU Supervisor with 32Kbit SPI EEPROM
X5328S8IZ RENESAS

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 		CPU Supervisor with 32Kbit SPI EEPROM; SOIC8; Temp Range: See Datasheet
X5328S8IZ-2.7 RENESAS

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 		CPU Supervisor with 32Kbit SPI EEPROM; SOIC8; Temp Range: See Datasheet
X5328S8IZ-2.7A INTERSIL

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 		CPU Supervisor with 32Kbit SPI EEPROM
X5328S8IZ-2.7A RENESAS

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 		CPU Supervisor with 32Kbit SPI EEPROM; SOIC8; Temp Range: See Datasheet

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