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X5325P-4.5A PDF预览

X5325P-4.5A

更新时间： 2024-11-10 20:33:27
品牌 Logo 应用领域
XICOR 光电二极管
页数 文件大小 规格书
21页 202K
描述
Power Supply Management Circuit, Adjustable, 1 Channel, PDIP8, PLASTIC, DIP-8

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X5325P-4.5A 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：PLASTIC, DIP-8Reach Compliance Code：unknown
风险等级：5.73可调阈值：YES
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDIP-T8
JESD-609代码：e0长度：10.03 mm
信道数量：1功能数量：1
端子数量：8最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE认证状态：Not Qualified
座面最大高度：4.32 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
宽度：7.62 mmBase Number Matches：1

X5325P-4.5A 数据手册

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Replaces X25323/X25325  
X5323/X5325  
CPU Supervisor with 32Kb SPI EEPROM  
FEATURES  
• Selectable watchdog timer  
• Low V detection and reset assertion  
DESCRIPTION  
These devices combine four popular functions, Power-on  
Reset Control, Watchdog Timer, Supply Voltage  
Supervision, and Block Lock Protect Serial EEPROM  
Memory in one package. This combination lowers  
system cost, reduces board space requirements, and  
increases reliability.  
CC  
—Five standard reset threshold voltages  
—Re-program low V reset threshold voltage  
CC  
using special programming sequence  
—Reset signal valid to V = 1V  
CC  
• Determine watchdog or low voltage reset with a  
volatile flag bit  
Applying power to the device activates the power on  
reset circuit which holds RESET/RESET active for a  
period of time. This allows the power supply and oscilla-  
tor to stabilize before the processor can execute code.  
• Long battery life with low power consumption  
—<50µA max standby current, watchdog on  
—<1µA max standby current, watchdog off  
—<400µA max active current during read  
• 32Kbits of EEPROM  
• Built-in inadvertent write protection  
—Power-up/power-down protection circuitry  
—Protect 0, 1/4, 1/2 or all of EEPROM array with  
Block Lock™ protection  
—In circuit programmable ROM mode  
• 2MHz SPI interface modes (0,0 & 1,1)  
• Minimize EEPROM programming time  
—32-byte page write mode  
The Watchdog Timer provides an independent protec-  
tion mechanism for microcontrollers. When the micro-  
controller fails to restart a timer within a selectable  
time out interval, the device activates the RESET/  
RESET signal. The user selects the interval from three  
preset values. Once selected, the interval does not  
change, even after cycling the power.  
The device’s low V  
detection circuitry protects the  
CC  
user’s system from low voltage conditions, resetting the  
system when V falls below the minimum V trip  
CC  
CC  
—Self-timed write cycle  
point. RESET/RESET is asserted until V  
returns to  
CC  
—5ms write cycle time (typical)  
• 2.7V to 5.5V and 4.5V to 5.5V power supply  
operation  
• Available packages  
—14-lead TSSOP, 8-lead SOIC  
proper operating level and stabilizes. Five industry stan-  
dard V thresholds are available, however, Xicor’s  
TRIP  
unique circuits allow the threshold to be reprogrammed  
to meet custom requirements or to fine-tune the thresh-  
old for applications requiring higher precision.  
BLOCK DIAGRAM  
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
RESET/RESET  
SI  
Data  
Register  
Status  
Register  
SO  
X5323 = RESET  
X5325 = RESET  
Command  
Decode &  
Control  
Reset &  
Watchdog  
Timebase  
SCK  
8Kbits  
8Kbits  
CS/WDI  
Logic  
V
Threshold  
Reset Logic  
CC  
16Kbits  
Power On and  
Low Voltage  
Reset  
V
+
-
CC  
Generation  
V
TRIP  
Characteristics subject to change without notice. 1 of 21  
REV 1.1.2 11/13/01  
www.xicor.com  
1234567...21

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