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X25320VG PDF预览

X25320VG

更新时间： 2024-11-29 03:54:11
品牌 Logo 应用领域
ICMIC 可编程只读存储器
页数 文件大小 规格书
15页 388K
描述
SPI Serial E2PROM With Block LockTM Protection

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中文翻译

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X25320VG 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP,
针数：14Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.83最大时钟频率 (fCLK)：2 MHz
JESD-30 代码：R-PDSO-G14长度：5 mm
内存密度：32768 bit内存集成电路类型：EEPROM
内存宽度：8功能数量：1
端子数量：14字数：4096 words
字数代码：4000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：4KX8封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行：SERIAL
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1.2 mm串行总线类型：SPI
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mm最长写入周期时间 (tWC)：10 ms
Base Number Matches：1

X25320VG 数据手册

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TM  
ICmic  
4K x 8 Bit  
This X25320 device has been acquired by  
IC MICROSYSTEMS from Xicor, Inc.  
IC MICROSYSTEMS  
32K  
X25320  
SPI Serial E2PROM With Block LockTM Protection  
FEATURES  
DESCRIPTION  
The X25320 is a CMOS 32768-bit serial E2PROM,  
internally organized as 4K x 8. The X25320 features a  
•2MHz Clock Rate  
•SPI Modes (0,0 & 1,1)  
•4K X 8 Bits  
Serial Peripheral Interface (SPI) and software protocol  
allowing operation on a simple three-wire bus. The bus  
— 32 Byte Page Mode  
•Low Power CMOS  
signals are a clock input (SCK) plus separate data in (SI)  
and data out (SO) lines. Access to the device is con-  
—<1µA Standby Current  
— <5mA Active Current During Write  
•2.7V To 5.5V Power Supply  
•Block Lock Protection  
— Protect 1/4, 1/2 or all of E2PROM Array  
•Built-in Inadvertent Write Protection  
trolled through a chip select (CS) input, allowing any  
number of devices to share the same bus.  
The X25320 also features two additional inputs that  
provide the end user with added flexibility. By asserting  
the HOLD input, the X25320 will ignore transitions on its  
inputs, thus allowing the host to service higher priority  
— Power-Up/Power-Down protection circuitry  
— Write Enable Latch  
interrupts. The WP input can be used as a hardwire input to  
the X25320 disabling all write attempts to the status  
— Write Protect Pin  
•Self-Timed Write Cycle  
register, thus providing a mechanism for limiting end user  
capability of altering 0, 1/4, 1/2 or all of the memory.  
— 5ms Write Cycle Time (Typical)  
•High Reliability  
— Endurance: 100,000 cycles  
— Data Retention: 100 Years  
The X25320 utilizes Xicor’s proprietary Direct Write™ cell,  
providing a minimum endurance of 100,000 cycles  
and a minimum data retention of 100 years.  
— ESD protection: 2000V on all pins  
•8-Lead PDlP Package  
•8-Lead SOIC Package  
•14-Lead TSSOP Package  
FUNCTIONAL DIAGRAM  
WRITE  
PROTECT  
LOGIC  
STATUS  
REGISTER  
X DECODE  
LOGIC  
4K BYTE  
ARRAY  
32  
32  
64  
32 X 256  
32 X 256  
SO  
SI  
COMMAND  
DECODE  
AND  
CONTROL  
LOGIC  
SCK  
CS  
HOLD  
64 X 256  
WRITE  
CONTROL  
AND  
TIMING  
LOGIC  
WP  
32  
8
Y DECODE  
DATA REGISTER  
3063 ILL F01  
Direct Write™ and Block Lock™ Protection is a trademark of Xicor, Inc.  
©Xicor, Inc. 1994, 1995, 1996 Patents Pending  
3063-3.9 6/11/96 T4/C1/D0 NS  
Characteristics subject to change without notice  
1
1234567...15

中文翻译

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