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X25323

更新时间: 2024-11-28 22:35:27
品牌 Logo 应用领域
XICOR 监控可编程只读存储器
页数 文件大小 规格书
16页 79K
描述
Programmable Watchdog Timer & V CC Supervisory Circuit w/Serial E 2 PROM

X25323 数据手册

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8K x 8 Bit  
4K x 8 Bit  
2K x 8 Bit  
64K  
32K  
16K  
X25643/45  
X25323/25  
X25163/65  
Programmable Watchdog Timer & V  
Supervisory Circuit w/Serial E2PROM  
CC  
FEATURES  
DESCRIPTION  
• Programmable Watchdog Timer  
These devices combine three popular functions, Watch-  
dog Timer, Supply Voltage Supervision, and Serial  
E2PROM Memory in one package.This combination low-  
ers system cost, reduces board space requirements, and  
increases reliability.  
• Low Vcc Detection and Reset Assertion  
—Reset Signal Valid to Vcc=1V  
• Save Critical Data With Block LockTM Protection  
—Block LockTM Protect 0, 1/4, 1/2 or all of  
Serial E2PROM Memory Array  
The Watchdog Timer provides an independent protection  
mechanism for microcontrollers. During a system failure,  
the device will respond with a RESET/RESET signal  
after a selectable time-out interval. The user selects the  
interval from three preset values. Once selected, the  
interval does not change, even after cycling the power.  
• In Circuit Programmable ROM Mode  
• Long Battery Life With Low Power Consumption  
—<50µA Max Standby Current, Watchdog On  
—<1µA Max Standby Current, Watchdog Off  
—<5mA Max Active Current during Write  
—<400µA Max Active Current during Read  
• 1.8V to 3.6V, 2.7V to 5.5V and 4.5V to 5.5V Power  
Supply Operation  
• 2MHz Clock Rate  
• Minimize Programming Time  
—32 Byte Page Write Mode  
The user’s system is protected from low voltage condi-  
tions by the device’s low Vcc detection circuitry. When  
Vcc falls below the minimum Vcc trip point, the system is  
reset. RESET/RESET is asserted until Vcc returns to  
proper operating levels and stabilizes.  
—Self-Timed Write Cycle  
The memory portion of the device is a CMOS Serial  
E2PROM array with Xicor’s Block LockTM Protection. The  
array is internally organized as x 8.The device features a  
Serial Peripheral Interface (SPI) and software protocol  
allowing operation on a simple four-wire bus.  
—5ms Write Cycle Time (Typical)  
• SPI Modes (0,0 & 1,1)  
• Built-in Inadvertent Write Protection  
Power-Up/Power-Down Protection Circuitry  
—Write Enable Latch  
—Write Protect Pin  
• High Reliability  
• Available Packages  
—14-Lead SOIC (X2564x)  
The device utilizes Xicor’s proprietary Direct WriteTM cell,  
providing a minimum endurance of 100,000 cycles per  
sector and a minimum data retention of 100 years.  
—14-Lead TSSOP (X2532x, X2516x)  
—8-Lead SOIC (X2532x, X2516x)  
BLOCK DIAGRAM  
SI  
DATA  
PAGE DECODE LOGIC  
REGISTER  
SO  
32  
8
COMMAND  
DECODE &  
CONTROL  
LOGIC  
X - DECODE  
LOGIC  
SCK  
CS  
SERIAL  
E2PROM  
ARRAY  
STATUS  
REGISTER  
RESET  
CONTROL  
RESET/RESET  
LOW  
VOLTAGE  
SENSE  
WATCHDOG  
TIMER  
V
CC  
HIGH  
VOLTAGE  
CONTROL  
PROGRAMMING,  
BLOCK LOCK &  
ICP ROM CONTROL  
WP  
7036 FRM 01  
Xicor, Inc. 1994, 1995, 1996 Patents Pending  
7049 -1.0 6/20/97 T0/C0/D0 SH  
Characteristics subject to change without notice  
1

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