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X25256A8I-2.5 PDF预览

X25256A8I-2.5

更新时间: 2024-11-23 18:09:23
品牌 Logo 应用领域
XICOR 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
17页 492K
描述
EEPROM, 32KX8, Serial, CMOS, PDSO8, 0.200 INCH, EIAJ, PLASTIC, SOIC-8

X25256A8I-2.5 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:0.200 INCH, EIAJ, PLASTIC, SOIC-8Reach Compliance Code:unknown
风险等级:5.9最大时钟频率 (fCLK):5 MHz
数据保留时间-最小值:100耐久性:100000 Write/Erase Cycles
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:5.31 mm内存密度:262144 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:8
字数:32768 words字数代码:32000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/5 V
认证状态:Not Qualified座面最大高度:2.03 mm
串行总线类型:SPI最大待机电流:0.000001 A
子类别:EEPROMs最大压摆率:0.005 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.27 mm
最长写入周期时间 (tWC):10 ms写保护:HARDWARE/SOFTWARE
Base Number Matches:1

X25256A8I-2.5 数据手册

 浏览型号X25256A8I-2.5的Datasheet PDF文件第2页浏览型号X25256A8I-2.5的Datasheet PDF文件第3页浏览型号X25256A8I-2.5的Datasheet PDF文件第4页浏览型号X25256A8I-2.5的Datasheet PDF文件第5页浏览型号X25256A8I-2.5的Datasheet PDF文件第6页浏览型号X25256A8I-2.5的Datasheet PDF文件第7页 
Preliminary Information  
256K  
32K x 8 Bit  
X25256  
5MHz SPI Serial E2PROM with Block LockProtection  
FEATURES  
• Packages  
—8-lead XBGA  
—8-lead SOIC (JEDEC, EIAJ)  
—20-lead TSSOP  
• 5MHz Clock Rate  
• Low Power CMOS  
—<1µA standby current  
—<5mA active current  
• 2.5V To 5.5V Power Supply  
• SPI Modes (0,0 & 1,1)  
DESCRIPTION  
The X25256 is a CMOS 256K-bit serial E2PROM, inter-  
nally organized as 32K x 8. The X25256 features a  
Serial Peripheral Interface (SPI) and software protocol  
allowing operation on a simple three-wire bus. The bus  
signals are a clock input (SCK) plus separate data in  
(SI) and data out (SO) lines. Access to the device is  
controlled through a chip select (CS) input, allowing any  
number of devices to share the same bus.  
• 32K X 8 Bits  
—64 byte page mode  
• Block LockProtection  
—Protect first page, first 2 pages, first 4 pages,  
first 8 pages, 1/4, 1/2 or all of E2PROM array  
• Programmable Hardware Write Protection  
—In-circuit programmable ROM mode  
• Built-In Inadvertent Write Protection  
Power-up/down protection circuitry  
—Write enable latch  
The X25256 also features two additional inputs that  
provide the end user with added flexibility. By asserting  
the HOLD input, the X25256 will ignore transitions on its  
inputs, thus allowing the host to service higher priority  
interrupts. The WP input can be used as a hardwire  
input to the X25256 disabling all write attempts to the  
status register, thus providing a mechanism for limiting  
end user capability of altering first page, first 2 pages, 4  
pages, 8 pages, 0, 1/4, 1/2 or all of the memory.  
—Write protect pin  
• Self-Timed Write Cycle  
—5ms write cycle time (typical)  
• High Reliability  
—Endurance: 100,000 cycles  
—Data Retention: 100Years  
—ESD protection: 2000V on all pins  
FUNCTIONAL DIAGRAM  
Write  
Status  
Protect  
Register  
Logic  
32K Byte  
Array  
128  
128 X 512  
SO  
SI  
SCK  
CS  
HOLD  
Command  
Decode  
128  
X-Decode  
Protect  
Logic  
And  
128 X 512  
Control  
Logic  
248  
4
248 X 512  
4 X 512  
256 X 512  
Write  
Control  
And  
Timing  
Logic  
2
1
1
2 X 512  
1 X 512  
1 X 512  
WP  
64  
8
Y Decode  
DataRegister  
Direct Writeand Block LockProtection is a trademark of Xicor, Inc.  
Characteristics subject to change without notice. 1 of 17  
REV 1.02 11/28/00  
www.xicor.com  

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