TM
This X25128 device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
ICmic
16K x 8 Bit
IC MICROSYSTEMS
128K
X25128
SPI Serial E2PROM with Block LockTM Protection
FEATURES
DESCRIPTION
The X25128 is a CMOS 131,072-bit serial E2PROM,
internally organized as 16K x 8. The X25128 features
•2MHz Clock Rate
•SPI Modes (0,0 & 1,1)
•16K X 8 Bits
—32 Byte Page Mode
a Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus.
•Low Power CMOS
—<1µA Standby Current
The bus signals are a clock input (SCK) plus separate data
in (SI) and data out (SO) lines. Access to the
—<5mA Active Current
•2.7V To 5.5V Power Supply
device is controlled through a chip select (CS) input,
allowing any number of devices to share the same
bus.
•Block Lock Protection
—Protect 1/4, 1/2 or all of E PROM Array
2
The X25128 also features two additional inputs that
provide the end user with added flexibility. By
•Built-in Inadvertent Write Protection
—Power-Up/Power-Down protection circuitry
—Write Enable Latch
asserting the HOLD input, the X25128 will ignore tran-
sitions on its inputs, thus allowing the host to service
—Write Protect Pin
higher priority interrupts. The WP input can be used as a
hardwire input to the X25128 disabling all write
•Self-Timed Write Cycle
—5ms Write Cycle Time (Typical)
•High Reliability
—Endurance: 100,000 cycles
—Data Retention: 100 Years
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
—ESD protection: 2000V on all pins
•14-Lead SOIC Package
•16-Lead SOIC Package
•8-Lead PDIP Package
The X25128 utilizes Xicor’s proprietary Direct Write™ cell,
providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
FUNCTIONAL DIAGRAM
WRITE
STATUS
PROTECT
REGISTER
X DECODE
LOGIC
16K BYTE
ARRAY
LOGIC
128
128
256
16 X 256
16 X 256
32 X 256
SO
SI
COMMAND
DECODE
AND
CONTROL
LOGIC
SCK
CS
HOLD
WRITE
CONTROL
AND
TIMING
LOGIC
WP
32
8
Y DECODE
DATA REGISTER
3091 FM F01
©Xicor Inc. 1994, 1995, 1996 Patents Pending
Characteristics subject to change without notice
3091-2.9 5/14/97 T2/C0/D2 SH
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