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X25040PMG-3 PDF预览

X25040PMG-3

更新时间: 2024-11-12 04:24:47
品牌 Logo 应用领域
ICMIC 内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
14页 117K
描述
SPI Serial E2PROM with Block LockTM Protection

X25040PMG-3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:8
Reach Compliance Code:unknownECCN代码:3A001.A.2.C
HTS代码:8542.32.00.51风险等级:5.83
最大时钟频率 (fCLK):1 MHzJESD-30 代码:R-PDIP-T8
长度:10.03 mm内存密度:4096 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:8
字数:512 words字数代码:512
工作模式:SYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:512X8
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:4.32 mm
串行总线类型:SPI最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
最长写入周期时间 (tWC):10 msBase Number Matches:1

X25040PMG-3 数据手册

 浏览型号X25040PMG-3的Datasheet PDF文件第2页浏览型号X25040PMG-3的Datasheet PDF文件第3页浏览型号X25040PMG-3的Datasheet PDF文件第4页浏览型号X25040PMG-3的Datasheet PDF文件第5页浏览型号X25040PMG-3的Datasheet PDF文件第6页浏览型号X25040PMG-3的Datasheet PDF文件第7页 
TM  
ICmic  
512 x 8 Bit  
This X25040 device has been acquired by  
IC MICROSYSTEMS from Xicor, Inc.  
IC MICROSYSTEMS  
4K  
X25040  
SPI Serial E2PROM with Block LockTM Protection  
FEATURES  
DESCRIPTION  
The X25040 is a CMOS 4096-bit serial E2PROM, internally  
organized as 512 x 8. The X25040 features a Serial  
1MHz Clock Rate  
SPI Modes (0,0 & 1,1)  
512 X 8 Bits  
4 Byte Page Mode  
Peripheral Interface (SPI) and software protocol allowing  
operation on a simple three-wire bus. The bus  
Low Power CMOS  
—150µA Standby Current  
—3mA Active Current  
signals are a clock input (SCK) plus separate data in (SI) and  
data out (SO) lines. Access to the device is controlled  
through a chip select (CS) input, allowing any number of  
devices to share the same bus.  
2.7V To 5.5V Power Supply  
Block Lock Protection  
The X25040 also features two additional inputs that  
provide the end user with added flexibility. By asserting  
Protect 1/4, 1/2 or all of E2PROM Array  
Built-in Inadvertent Write Protection  
—Power-Up/Power-Down protection circuitry  
—Write Latch  
the HOLD input, the X25040 will ignore transitions on its  
inputs, thus allowing the host to service higher priority  
interrupts. The WP input can be used as a hardwire input to  
the X25040 disabling all write attempts, thus providing  
Write Protect Pin  
a mechanism for limiting end user capability of altering the  
memory.  
Self-Timed Write Cycle  
5ms Write Cycle Time (Typical)  
High Reliability  
—Endurance: 100,000 cycles per byte  
—Data Retention: 100 Years  
The X25040 utilizes Xicor’s proprietary Direct Write™ cell,  
providing a minimum endurance of 100,000 cycles  
per byte and a minimum data retention of 100 years.  
ESD protection: 2000V on all pins  
8-Lead PDlP Package  
8-Lead SOIC Package  
FUNCTIONAL DIAGRAM  
WRITE  
PROTECT  
LOGIC  
STATUS  
REGISTER  
X DECODE  
LOGIC  
512 BYTE  
ARRAY  
32  
32  
64  
32 X 32  
32 X 32  
64 X 32  
SO  
SI  
COMMAND  
DECODE  
SCK  
AND  
CONTROL  
LOGIC  
CS  
HOLD  
WRITE  
CONTROL  
AND  
TIMING  
LOGIC  
WP  
4
8
Y DECODE  
DATA REGISTER  
6451 FHD F01  
Direct Write™ and Block Lock™ Protection is a trademark of Xicor, Inc.  
©Xicor, Inc. 1994, 1995, 1996 Patents Pending  
6451-3.6 6/10/96 T5/C1/D0 NS  
Characteristics subject to change without notice  
1

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