TM
This X24320 device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
ICmic
4K x 8 Bit
IC MICROSYSTEMS
32K
X24320
400KHz 2-Wire Serial E2PROM with Block LockTM
FEATURES
DESCRIPTION
The X24320 is a CMOS Serial E2PROM, internally
organized 4K x 8. The device features a serial inter-
•Save Critical Data with Programmable
Block Lock Protection
—Block Lock (0, 1/4, 1/2, or all of E2PROM Array)
—Software Write Protection
face and software protocol allowing operation on a
simple two wire bus. The bus operates at 400 KHz all
the way down to 1.8V.
—Programmable Hardware Write Protect
•In Circuit Programmable ROM Mode
Three device select inputs (S0–S2) allow up to eight
devices to share a common two wire bus.
•400KHz 2-Wire Serial Interface
—Schmitt Trigger Input Noise Suppression
—Output Slope Control for Ground Bounce
Noise Elimination
A Write Protect Register at the highest address location,
FFFFh, provides three write protection features:
•Longer Battery Life With Lower Power
Software Write Protect, Block Lock Protect, and
Programmable Hardware Write Protect. The Software
—Active Read Current Less Than 1mA
—Active Write Current Less Than 3mA
—Standby Current Less Than 1µA
Write Protect feature prevents any nonvolatile writes to the
device until the WEL bit in the Write Protect
•1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V
Power Supply Versions
Register is set. The Block Lock Protection feature gives
the user four array block protect options, set by
•32 Word Page Write Mode
—Minimizes Total Write Time Per Word
•Internally Organized 4K x 8
programming two bits in the Write Protect Register. The
Programmable Hardware Write Protect feature
allows the user to install the device with WP tied to
VCC, write to and Block Lock the desired portions of
•Bidirectional Data Transfer Protocol
•Self-Timed Write Cycle
—Typical Write Cycle Time of 5ms
the memory array in circuit, and then enable the In
Circuit Programmable ROM Mode by programming the
•High Reliability
—Endurance: 100,000 Cycles
WPEN bit HIGH in the Write Protect Register. After this,
the Block Locked portions of the array, including
—Data Retention: 100 Years
•8-Lead SOIC
the Write Protect Register itself, are permanently
protected from being erased.
•14-Lead TSSOP
•8-Lead PDIP
FUNCTIONAL DIAGRAM
SERIAL E2PROM DATA
AND ADDRESS (SDA)
DATA REGISTER
Y DECODE LOGIC
COMMAND
DECODE
AND
CONTROL
LOGIC
SERIAL E2PROM
SCL
ARRAY
4K x 8
PAGE
DECODE
LOGIC
1K x 8
1K x 8
BLOCK LOCK AND
WRITE PROTECT
CONTROL LOGIC
S2
S1
S0
DEVICE
SELECT
LOGIC
WRITE
PROTECT
REGISTER
2K x 8
WRITE VOLTAGE
CONTROL
WP
7035 FM 01
Xicor, 1995, 1996 Patents Pending
Characteristics subject to change without notice
7035-1.2 4/25/97 T0/C2/D0 SH
1