Preliminary
256K
X24256
32K x 8 Bit
400KHz 2-Wire Serial E2PROM
FEATURES
DESCRIPTION
• 400KHz 2-Wire Serial Interface
—Schmitt Trigger Input Noise Suppression
—Output Slope Control for Ground Bounce
Noise Elimination
The X24256 is a CMOS Serial E2PROM, internally
organized 32K x 8. The device features a serial inter-
face and software protocol allowing operation on a
simple two wire bus.
• Longer Battery Life With Lower Power
—Active Read Current Less Than 1mA
—Active Write Current Less Than 3mA
—Standby Current Less Than 1µA
• 1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V Power
Supply Versions
Two device select inputs (S –S ) allow up to four
devices to share a common two wire bus.
0
1
These pins have internal pull downs, so they are read
as LOW if not connected.
A WP pin, when pulled HIGH prevents any nonvolatile
writes to the array. When not connected WP is pulled
LOW, so the device is not normally protected.
• 64 Byte Page Write Mode
—Minimizes Total Write Time Per Word
• Internally Organized 32K x 8
• Bidirectional Data Transfer Protocol
• Self-Timed Write Cycle
—Typical Write Cycle Time of 5ms
• High Reliability
Xicor E2PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data
retention is greater than 100 years.
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
• 8-Lead XBGA
• 8-Lead SOIC
• 14-Lead TSSOP
FUNCTIONAL DIAGRAM
DATA REGISTER
Y DECODE LOGIC
SERIAL E2PROM DATA
AND ADDRESS (SDA)
COMMAND
DECODE
SCL
PAGE
DECODE
LOGIC
AND
CONTROL
LOGIC
WRITE PROTECT
CONTROL LOGIC
SERIAL E2PROM
ARRAY
32K x 8
DEVICE
SELECT
LOGIC
S1
S0
WRITE VOLTAGE
CONTROL
WP
Xicor, 2000 Patents Pending
9800-5004.1 1/31/00 EP
Characteristics subject to change without notice. 1 of 18