Clock OSC
SG-210SCD
SG-210SCD 63.111600 MHz B
Product name
Product Number / Ordering code
X1G0029210080xx
Please refer to the 8.Packing information about xx (last 2 digits)
Output waveform CMOS
Pb free / Complies with EU RoHS directive
Reference weight Typ. 15 mg
1.Absolute maximum ratings
Parameter
Symbol
Vcc-GND
T_stg
Min.
-0.5
-40
Typ.
Max.
+7
+125
Unit
V
ºC
V
Conditions / Remarks
-
Storage as single product
ST terminal
Maximum supply voltage
Storage temperature
Input voltage
-
-
-
Vin
-0.3
Vcc+0.3
2.Specifications(characteristics)
Parameter
Output frequency
Symbol
Min.
Typ.
63.111600
Max.
Unit
MHz
V
Conditions / Remarks
f0
Vcc
T_use
f_tol
Icc
I_std
SYM
VOH
VOL
L_CMOS
VIH
-
Supply voltage
2.7
-20
-50
-
-
45
Vcc-0.4
3.3
-
-
-
-
-
-
-
3.6
+70
50
8
10.0
55
-
0.4
30
-
-
Operating temperature
Frequency tolerance
Current consumption
Stand-by current
Symmetry
ºC
x10-6
mA
µA
T_use
No load condition
ST = GND
50% Vcc Level L_CMOS =<30pF
IOH=-8mA
%
Output voltage
IOL=8mA
-
-
CMOS Load
Output load condition
Input voltage
-
-
pF
ST terminal
0.7Vcc
VIL
tr
ST terminal
-
-
-
-
-
-
-
-
-
-
-
0.3Vcc
0.2Vcc to 0.8Vcc Level, L_CMOS=30pF
0.2Vcc to 0.8Vcc Level, L_CMOS=30pF
t = 0 at 0.9Vcc
Rise time
Fall time
Start-up time
Jitter
4
4
2
-
-
-
ns
ns
ms
ps
ps
ps
ps
tf
t_str
tDJ
tRJ
tRMS
tp-p
-
Deterministic Jitter Vcc=3.3
Random Jitter Vcc=3.3V
δ(RMS of total distribution) Vcc=3.3V
Peak to Peak Vcc=3.3V
TBD
TBD
TBD
TBD
-
Accumulated Jitter(δ) n=2 to 50000
cycles
tacc
-
-
-
ps
Off set Frequency: 12kHz to 20MHz Vcc=3.3V
-
Phase jitter
tPJ
-
-
-
-
-
-
-
-
TBD
-
-
-
-
-
-
-
-
-
3
10
ps
Phase noise
L(f)
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
x10-6
Off set 10Hz Vcc=3.3V
Off set 100Hz Vcc=3.3V
Off set 1kHz Vcc=3.3V
Off set 10kHz Vcc=3.3V
Off set 100kHz Vcc=3.3V
Off set 1MHz Vcc=3.3V
@+25ºC first year
TBD
TBD
TBD
TBD
TBD
TBD
-
Frequency aging
f_age
-3
-10
25℃,10Years
-
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