5秒后页面跳转
WM8804GEDSR PDF预览

WM8804GEDSR

更新时间: 2024-11-23 03:54:39
品牌 Logo 应用领域
欧胜 - WOLFSON /
页数 文件大小 规格书
66页 693K
描述
1:1 Digital Interface Transceiver with PLL

WM8804GEDSR 数据手册

 浏览型号WM8804GEDSR的Datasheet PDF文件第2页浏览型号WM8804GEDSR的Datasheet PDF文件第3页浏览型号WM8804GEDSR的Datasheet PDF文件第4页浏览型号WM8804GEDSR的Datasheet PDF文件第5页浏览型号WM8804GEDSR的Datasheet PDF文件第6页浏览型号WM8804GEDSR的Datasheet PDF文件第7页 
WM8804  
w
1:1 Digital Interface Transceiver with PLL  
DESCRIPTION  
FEATURES  
S/PDIF (IEC60958-3) compliant.  
The WM8804 is a high performance consumer mode  
S/PDIF transceiver with support for 1 received channel and  
1 transmitted channel.  
Advanced jitter attenuating PLL with low intrinsic period  
jitter of 50 ps RMS.  
S/PDIF recovered clock using PLL, or stand alone crystal  
derived clock generation.  
A crystal derived, or externally provided high quality master  
clock is used to allow low jitter recovery of S/PDIF supplied  
master clocks.  
Supports 10 – 27MHz crystal clock frequencies.  
2-wire / 3-Wire serial or hardware control interface.  
Programmable audio data interface modes:  
Generation of all typically used audio clocks is possible  
using the high performance internal PLL. A dedicated  
CLKOUT pin provides a high drive clock output.  
-
-
I2S, Left, Right Justified or DSP  
16/20/24 bit word lengths  
A pass through option is provided which allows the device  
simply to be used to clean up (de-jitter) the received digital  
audio signals.  
1 channel receiver input and 1 channel transmit output.  
Auto frequency detection / synchronisation.  
Selectable output status data bits.  
The device may be used under software control or stand  
alone hardware control modes. In software control mode,  
both 2-wire with read back and 3-wire interface modes are  
supported.  
Up to 3 configurable GPO pins.  
De-emphasis flag output.  
Non-audio detection including DOLBYTM and DTSTM  
.
Channel status changed flag.  
Status and error monitoring is built-in and results can be  
read back over the control interface, on the GPO pins or  
streamed over the audio data interface in ‘With Flags’ mode  
(audio data with status flags appended).  
Configurable clock distribution with selectable output  
MCLK rate of 512fs, 256fs, 128fs and 64fs.  
2.7 to 3.6V digital and PLL supply voltages.  
20-lead SSOP package.  
The audio data interface supports I2S, left justified, right  
justified and DSP audio formats of 16-24 bit word length,  
with sample rates from 32 to 192ks/s.  
APPLICATIONS  
AV processors and Hi-Fi systems  
Music industry applications  
DVD-P/DVD-RW  
The device is supplied in a 20-lead Pb-free SSOP package.  
Digital TV  
BLOCK DIAGRAM  
WOLFSON MICROELECTRONICS plc  
Production Data, September 2007, Rev 4.1  
Copyright ©2007 Wolfson Microelectronics plc  
To receive regular email updates, sign up at http://ww.wolfsonmicro.omenews/  

与WM8804GEDSR相关器件

型号 品牌 获取价格 描述 数据表
WM8805 WOLFSON

获取价格

8:1 Digital Interface Transceiver with PLL
WM8805 CIRRUS

获取价格

S/PDIF 数字接口收发器
WM8805GEDR WOLFSON

获取价格

8:1 Digital Interface Transceiver with PLL
WM8805GEDS WOLFSON

获取价格

8:1 Digital Interface Transceiver with PLL
WM8816 WOLFSON

获取价格

Stereo Digital Volume Control
WM8816_04 WOLFSON

获取价格

Stereo Digital Volume Control
WM8816-MICRO-EV1M WOLFSON

获取价格

Micro-Controller Board User Handbook
WM8850 WOLFSON

获取价格

Multi-Channel High Definition Audio CODEC
WM8850GEFL/RV WOLFSON

获取价格

Multi-Channel High Definition Audio CODEC
WM8850GEFL/V WOLFSON

获取价格

Multi-Channel High Definition Audio CODEC