n
n
n
n
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5 Volt Programming. 5V 10ꢀ Supply
Low Power CMOS, 1mA Standby Typical
Embedded Erase and Program Algorithms
TTL Compatible Inputs and CMOS Outputs
n
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Access Times of 50*, 60, 70, 90, 120, 150ns
Packaging:
•66 pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400)
•68 lead, Hermetic CQFP (G2U)1, 22.4mm (0.880 inch)
square, 3.56mm (0.140 inch) high (Package 510)
Built-in Decoupling Caps and Multiple Ground Pins for
Low Noise Operation
•68 lead, Hermetic CQFP (G1U), 23.9mm (0.940 inch)
square, 3.56mm (0.140 inch) high (Package 519)
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Page Program Operation and Internal Program Control
Time
•68 lead, Hermetic CQFP (G1T), 23.9mm (0.940 inch)
square, 4.06mm (0.160 inch) high (Package 524)
Weight
WF128K32-XG1UX5 - 5 grams typical
WF128K32-XG1TX5 - 5 grams typical
WF128K32-XG2UX51 - 8 grams typical
WF128K32-XH1X5 - 13 grams typical
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Sector Architecture
•8 equal size sectors of 16KBytes each
•Any combination of sectors can be concurrently
erased.
Also supports full chip erase
Note 1: Package Not Recommended For New Design
Note: For programming information refer to Flash Programming 1M5
Application Note.
* The access time of 50ns is available in Industrial and Commercial temperature
ranges only.
n 100,000 Erase/Program Cycles Typical, 0°C to +70°C
Organized as 128Kx32
n Commercial, Industrial and Military Temperature Ranges
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PIN CONFIGURATION FOR WF128K32N-XH1X5
I/O0-31
A0-16
WE1-4
CS1-4
OE
DataInputs/Outputs
AddressInputs
WriteEnables
ChipSelects
I/O24
I/O25
I/O26
A7
VCC
CS4
WE4
I/O27
A4
I/O31
I/O30
I/O29
I/O28
A1
I/O8
I/O9
I/O10
A14
WE2
CS2
GND
I/O11
A10
I/O15
I/O14
I/O13
I/O12
OE
OutputEnable
PowerSupply
Ground
VCC
A12
A16
GND
NC
NC
A5
A2
A11
A9
NC
NotConnected
A13
A6
A3
A0
A15
WE1
I/O7
I/O6
I/O5
I/O4
A8
WE3
CS3
GND
I/O19
I/O23
I/O22
I/O21
I/O20
NC
I/O0
I/O1
I/O2
VCC
CS1
NC
I/O16
I/O17
I/O18
I/O3
June 2002 Rev. 5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com