SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 – JULY 2002
Member of the Texas Instruments
Widebus Family
I
Supports Partial-Power-Down Mode
off
Operation
DOC Circuitry Dynamically Changes
Output Impedance, Resulting in Noise
Reduction Without Speed Degradation
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.4-V to
3.6-V Power-Supply Range
Dynamic Drive Capability Is Equivalent to
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Standard Outputs With I
±24 mA at 2.5-V V
and I
of
OH
OL
CC
Control Inputs V /V Levels are
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
IH IL
Referenced to V
Voltage
CCA
If Either V
Are in the High-Impedance State
Input Is at GND, Both Ports
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
CC
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
– 1000-V Charged-Device Model (C101)
description/ordering information
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The
A-port is designed to track V . V accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed
CCA CCA
to track V
. V
accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage
CCB CCB
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCAH164245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCAH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by
V
.
CCA
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
Toensurethehigh-impedancestateduringpoweruporpowerdown,OEshouldbetiedtoV
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
throughapullup
CCA
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventingdamagingcurrentbackflowthroughthedevicewhenitispowereddown.IfeitherV inputisatGND,
CC
then both ports are in the high-impedance state.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
TSSOP – DGG Tape and reel SN74AVCAH164245GR
AVCAH164245
WAH4245
–40°C to 85°C
TVSOP – DGV
VFBGA – GQL
Tape and reel SN74AVCAH164245VR
Tape and reel SN74AVCAH164245KR
WAH4245
†
Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DOC and Widebus are trademarks of Texas Instruments.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265