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W3L16C474MAT3A

更新时间: 2024-11-17 11:23:03
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京瓷/艾维克斯 - KYOCERA AVX /
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描述
InterDigitated Cap

W3L16C474MAT3A 数据手册

 浏览型号W3L16C474MAT3A的Datasheet PDF文件第2页 
IDC Low Inductance Capacitors (RoHS)  
IDC (InterDigitated Capacitors) 0306/0612/0508  
GENERAL DESCRIPTION  
Inter-Digitated Capacitors (IDCs) are used for both semiconductor package and  
board level decoupling. The equivalent series inductance (ESL) of a single capacitor  
or an array of capacitors in parallel determines the response time of a Power  
Delivery Network (PDN). The lower the ESL of a PDN, the faster the response time. A  
designer can use many standard MLCCs in parallel to reduce ESL or a low ESL Inter-  
Digitated Capacitor (IDC) device. These IDC devices are available in versions with a  
maximum height of 0.95mm or 0.55mm.  
0612  
+
+
IDCs are typically used on packages of semiconductor products with power levels  
of 15 watts or greater. Inter-Digitated Capacitors are used on CPU, GPU, ASIC, and  
ASSP devices produced on 0.13μ, 90nm, 65nm, and 45nm processes. IDC devices  
are used on both ceramic and organic package substrates. These low ESL surface  
mount capacitors can be placed on the bottom side or the top side of a package  
substrate. The low profile 0.55mm maximum height IDCs can easily be used on the  
bottom side of BGA packages or on the die side of packages under a heat spreader.  
0508  
+
+
IDCs are used for board level decoupling of systems with speeds of 300MHz or  
greater. Low ESL IDCs free up valuable board space by reducing the number of  
capacitors required versus standard MLCCs. There are additional benefits to  
reducing the number of capacitors beyond saving board space including higher  
reliability from a reduction in the number of components and lower placement costs  
based on the need for fewer capacitors.  
0306  
TYPICAL IMPEDANCE  
10  
The Inter-Digitated Capacitor (IDC) technology was developed by AVX. This is the  
second family of Low Inductance MLCC products created by AVX. IDCs are a cost  
effective alternative to AVX’s first generation low ESL family for high-reliability  
applications known as LICA (Low Inductance Chip Array).  
MLCC_1206  
LICC_0612  
1
0.1  
AVX IDC products are available with a lead-free finish of plated Nickel/Tin.  
IDC_0612  
0.01  
0.001  
1
10  
100  
1000  
Frequency (MHz)  
HOW TO ORDER  
W
3
L
1
6
D
225  
M
A
T
3
A
Style IDC Case  
Low  
Inductance  
Number of Voltage Dielectric Capacitance Capacitance Failure Termination Packaging  
Thickness  
Max. Thickness  
mm (in)  
A=Standard  
S=0.55 (0.022)  
4 = 4V  
6 = 6.3V  
Z = 10V  
Y = 16V  
3 = 25V  
C = X7R  
D = X5R  
Z = X7S  
T =Plated Ni  
and Sn  
Available  
1=7" Reel  
3=13" Reel  
Size  
Terminals  
1 = 8 Termi-  
nals  
Code (In pF)  
2 Sig. Digits +  
Number of  
Zeros  
Tolerance  
Rate  
2 = 0508  
3 = 0612  
4 = 0306  
M = ±20%  
A = N/A  
NOTE: Contact factory for availability of Termination and Tolerance Options for Specific Part Numbers.  
PERFORMANCE CHARACTERISTICS  
Capacitance Tolerance ±20% Preferred  
No problems observed after 2.5 x RVDC for 5  
seconds at 50mA max current  
Dissipation Factor  
X7R = -55°C to +125°C  
X5R = -55°C to +85°C  
X7S = -55°C to +125°C  
Operation  
CTE (ppm/C)  
12.0  
Temperature Range  
Thermal Conductivity  
4-5W/M K  
Temperature  
Coefficient  
Voltage Ratings  
±15% (0VDC), ±22% (X7S)  
Terminations  
Available  
Plated Nickel and Solder  
4, 6.3, 10, 16, 25 VDC  
≤ 6.3V = 6.5% max;  
Dissipation Factor  
10V = 5.0% max;  
≥ 16V = 3.5% max  
Insulation Resistance  
(@+25°C, RVDC)  
100,000MΩ min, or 1,000MΩ per μF  
min.,whichever is less  
The Important Information/Disclaimer is incorporated in the catalog where these specifications came from or  
available online at www.avx.com/disclaimer/ by reference and should be reviewed in full before placing any order.  
80  

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