W185
Six Output Peak Reducing EMI Solution
Features
Table 1. Modulation Width Selection
Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the
output
• Selectable output frequency range
• Six 1.25%, 3.75%, or 0% down or center spread outputs
• One non-Spread output of Reference input
• Integrated loop filter components
•
W185
W185-5
Output
SS%
Output
0
F
F
≥ F ≥ F – 1.25%
F + 0.625% ≥ F ≥
– 0.625%
in
in
out
in
in
in
1
≥ F ≥ F – 3.75%
F + 1.875% ≥ F ≥
–1.875%
out
in
in
in
• Operates with a 3.3V or 5V supply
• Low power CMOS design
Table 2. Frequency Range Selection
• Available in 24-pin SSOP (Shrink Small Outline
Package)
• Outputs may be selectively disabled
FS2
0
FS1
0
Frequency Range
28 MHz ≤ F ≤ 38 MHz
IN
0
1
38 MHz ≤ F ≤ 48 MHz
IN
Key Specifications
1
0
46 MHz ≤ F ≤ 60 MHz
IN
Supply Voltages: ...........................................V = 3.3V±5%
DD
1
1
58 MHz ≤ F ≤ 75 MHz
IN
or V = 5V±10%
DD
Frequency Range: ............................ 28 MHz ≤ F ≤ 75 MHz
in
Table 3. Output Enable
Crystal Reference Range:................. 28 MHz ≤ F ≤ 40 MHz
in
EN1
EN2
CLK0:4
CLK5
Cycle to Cycle Jitter: ....................................... 300 ps (max.)
Selectable Spread Percentage: ....................1.25% or 3.75%
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time: .................................. 5 ns (max.)
0
0
1
1
0
1
0
1
Low
Low
Low
Active
Low
Active
Active
Active
Simplified Block Diagram
Pin Configuration
3.3V or 5.0V
SSOP
REFOUT
FS2
SSON#
RESET
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
X1
X1
FS1
XTAL
Input
40MHz
max.
X2
VDD
VDD
X2
Spread Spectrum
Output
(EMI suppressed)
W185
GND
NC
SS%
EN2
GND
18 EN1
CLK5
17
3.3V or 5.0V
VDD
16
CLK0
VDD
CLK1
10
11
CLK4
GND
15
14
CLK2 12
CLK3
13
Oscillator or
Reference Input
Spread Spectrum
W185
Output
(EMI suppressed)
PREMIS is a trademark of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
July 25, 2000, rev. *A