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W181-53GI PDF预览

W181-53GI

更新时间: 2024-01-04 21:24:26
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
9页 121K
描述
Clock Generator, 75MHz, CMOS, PDSO8, 0.150 INCH, PLASTIC, SOIC-8

W181-53GI 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.75
其他特性:ALSO OPERATES AT 5V SUPPLYJESD-30 代码:R-PDSO-G8
长度:4.93 mm端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:75 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE主时钟/晶体标称频率:75 MHz
认证状态:Not Qualified座面最大高度:1.73 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.94 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

W181-53GI 数据手册

 浏览型号W181-53GI的Datasheet PDF文件第3页浏览型号W181-53GI的Datasheet PDF文件第4页浏览型号W181-53GI的Datasheet PDF文件第5页浏览型号W181-53GI的Datasheet PDF文件第6页浏览型号W181-53GI的Datasheet PDF文件第8页浏览型号W181-53GI的Datasheet PDF文件第9页 
W181I  
creased trace inductance will negate its decoupling capability.  
The 10-µF decoupling capacitor shown should be a tantalum  
type. For further EMI protection, the VDD connection can be  
made via a ferrite bead, as shown.  
Application Information  
Recommended Circuit Configuration  
For optimum performance in system applications the power  
supply decoupling scheme shown in Figure 4 should be used.  
Recommended Board Layout  
VDD decoupling is important to both reduce phase jitter and  
EMI radiation. The 0.1-µF decoupling capacitor should be  
placed as close to the VDD pin as possible, otherwise the in-  
Figure 5 shows a recommended 2-layer board layout.  
Reference Input  
1
2
3
4
8
7
6
5
NC  
GND  
Clock  
Output  
R1  
C1  
µF  
0.1  
3.3 or 5V System Supply  
FB  
C2  
10  
µF Tantalum  
Figure 4. Recommended Circuit Configuration  
C1 =  
C2 =  
High frequency supply decoupling  
µF recommended).  
capacitor (0.1-  
Common supply low frequency  
µF tantalum  
decoupling capacitor (10-  
recommended).  
R1 =  
Match value to line impedance  
Ferrite Bead  
FB  
=
G
Via To GND Plane  
=
Reference Input  
NC  
C1  
G
G
Clock Output  
R1  
G
C2  
Power Supply Input  
FB  
(3.3 or 5V)  
Figure 5. Recommended Board Layout (2-Layer Board)  
Ordering Information  
Freq. Mask  
Package  
Name  
Ordering Code  
Code  
Package Type  
Temperature Range  
W181I  
01, 02, 03  
51, 52, 53  
G
8-pin Plastic SOIC (150-mil) I = Industrial (-40°C to +85°C)  
Document #: 38-07115 Rev. **  
Page 7 of 9  

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